T2080 cache partition

[daeilkang]

Dear All

I am going to devlop the system by using T2080 and VxWorks 653 3.0 version.

I will use the fsl_t2080_qds evaluation board from freescale.

Question 1>

The L2 cahe of T2080 is shared among foru physical cores.

Is there any way to partition the L2 Cache to each core??

Please let me know how to do that.

Question 2>

There are two memac ports (memac 2 and memac 3) in t2080 QDS board.

I want to test different network configuration with this board.

First, I want to configure that  only one core can hanle tow memac ports.

What shall I do this?

Second, I also wanto to configure that first core hansles memac2, and second core handles memac3, respectively.

What shall I do this?

Third, If I want to add another memac port, like memac4.

What shall I do this?

If you have any query, please do not hesitate to ask me.

Thanks in advance.

Kang.

[Pavel]

1) Look at the Section 2.12.4 of the e6500 Core Reference Manual:

http://cache.nxp.com/files/32bit/doc/ref_manual/E6500RM.pdf?fsrch=1&sr=2&pageNum=1

2) It looks like that these questions are specific to VxWorks. If NXP SDK is used, see kernel configuration using kernel menu and .dts file.

Have a great day,
Pavel

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