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PCIe Endpoint Doorbell or Interrupt

Question asked by Carl Jackson on Jan 29, 2016

It is common for a PCIe add-in card to have a "doorbell" register or similar functionality (eg, a queue tail pointer) that the host system can write to start an I/O operation.  I haven't found a way to trigger an ARM interrupt as a result of an inbound PCIe write transaction with the i.MX6 operating in endpoint mode.  I'm currently stuck polling on memory locations which is a really ugly solution.  Is there a way to implement this type of behavior that doesn't rely on polling?