When TCF bit is asserted, a DMA request is initiated. Does this mean the DMA CH0 will be starting to transfer data and make the SDA line as GPIO, is this automatically done without asserting the start for DMA CH0? Then inside the ISR handler, after setting the DMA CH2 source and destination, DMA_DCR1 start bit is the one asserted. This means DMA CH1 will be started, making the SDA pin as peripheral mode. Now, when is the DMA CH2 data transfer started? Can you see any assertion of DMA_DCR2 start bit. Is the transfer automatically done after DMA_CH1 finished transferring data? Will PE configuration linking DMA CH1 to DMA CH2.