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Openocd how to implement watchpoint in cortex_a.c ?

Question asked by jesse stone on Jan 28, 2016
Latest reply on Jan 28, 2016 by jesse stone

how to implement in cortex_a.c ?

 

////

in cortex_m.h

#define DWT_COMP0    0xE0001020

#define DWT_MASK0    0xE0001024

#define DWT_FUNCTION0    0xE0001028

//

in cortex_m.c

for (i = 0; i < cm->dwt_num_comp; i++, comparator++)

    {

        int j;

 

        comparator->dwt_comparator_address = DWT_COMP0 + 0x10 * i;

 

        for (j = 0; j < 3; j++, reg++)

            cortex_m_dwt_addreg(target, cache->reg_list + reg, dwt_comp + 3 * i + j);

 

        target_write_u32(target, comparator->dwt_comparator_address + 8, 0);

    }

 

//do add watchpoint

comparator->comp = watchpoint->address;

    target_write_u32(target, comparator->dwt_comparator_address + 0, comparator->comp);

 

    comparator->mask = mask;

    target_write_u32(target, comparator->dwt_comparator_address + 4, comparator->mask);

 

    switch (watchpoint->rw)

    {

        case WPT_READ:

            comparator->function = 5;

            break;

        case WPT_WRITE:

            comparator->function = 6;

            break;

        case WPT_ACCESS:

            comparator->function = 7;

            break;

    }

  

    target_write_u32(target, comparator->dwt_comparator_address + 8, comparator->function);

 

////////////////////////////

in armv7a.h for cortex a8 a9

#define CPUDBG_WVR_BASE        0x180

#define CPUDBG_WCR_BASE        0x1C0

 

how to implement in cortex_a.c ?

1. the address/mask/function is CPUDBG_WVR_BASE+0 / CPUDBG_WVR_BASE+4 / CPUDBG_WVR_BASE+8 ?

2. the address/mask/function is CPUDBG_WCR_BASE+0 ......+4......+8?

3. WPT_READ/WPT_WRITE/WPT_ACCESS  is 5/6/7 on cortex a8 a9?

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