I have two question during design with P1022-
1. We are using One TSEC of P1022 in RGMII mode. Should we provide 125MHz clock in TSEC1_GTX_CLK125 pin? What should be it's source - Oscillator or external @PHY recovered clock?
2. We are using serdes1 for on 2xPCIe and one SGMII and serdes2 disabled. We provided 100MHz in SD1_REF_CLK pin and SD2_REF_CLK is grounded. Is the scheme correct or do we need to provide clock in SD2_REF_CLK pins as well?