Hello everyone, referring to I2C of MAG3110 reads: The SCL and SDA signals are driven by open-drain buffers ... How do you handle this open-drain ?? Someone can explain it to me? Thank you in advance
Referring to the K10 RM, in the Section 44.3.2 I2C Frequency Divider register (I2Cx_F), the I2Cx_F register has two fields:
- MULT --> This one configures the divider factor of the bus clock. Leaving this MULT = 0b00, the internal frequency = bus clock.
- ICR --> This value indicates the value of the SCL divider. You can check the SCL values corresponding to the ICR value in the Section 220.127.116.11 I2C Divider and Hold Values.
The equation to determinate the I2C baud rate is:
I2C baud rate = bus speed (Hz) / (mul × SCL divider)
Here is an example to set the SCL frequency to e.g. 100 kHz:
bus speed (Hz) = 48 MHz = 48 000 000 Hz
mul = 1
SCL divider = 480 (ICR = 0x27, check the table 44.41)
Applying the values in the equation:
48 000 000 / (1 * 480) = 100 000 Hz = 100 kHz
I hope this information can help you. If not, please ask our Kinetis experts.
I am not really sure what you want to know. Could you please rephrase your question or provide more details?
The MAG3110FC is compliant with NXP I2C specification (UM10204) for both Standard and Fast modes. It is an open-drain communication standard requiring pull-up resistors connected from the I2C lines to the supply to enable communication as shown in Figure 4 of the MAG3110FC datasheet. The pull-up resistors pull the line high when it is not driven low by the open-drain interface.
I hope it helps.
PS: If my answer helps to solve your question, please mark it as "Correct". Thank you.
yes, okay I thought of something else, thanks response. Changing the subject, I have to connect to a MK10DN512ZVLL10. I have some doubt, but now the main one is the definition of the I2C register Frequenzy Divider register (I2Cx_F). Bus Clock default is 48 MHz. This is the bus speed? How do I define correctly the other parameters?
if you have a moment I wanted to ask questions about the MAG3110,DR_STATUS I have to use just to read the records updated, changed and if I'm going to read the appropriate register OUT_x_xSB.The identificator what I need (WHO_AM_I) is not enough to address del'I2C (0x0E) to put the I2C?As for AC = 1 and TM = 0 is the best choice. These serve to set updating the registers that then I decide to go there in the algorithm when reading ...How do I define the registers OFF_x_xSB to adjust the values of OUT_x_xSB?REG2 with [RAW] = 0 the MAG3110 directly changes the OUTx_x_xSB without my fix, so I do not implement anything on the algorithm but only read the OUT?How should I set the frequency CTRL_REG1?Best regards,Niki
No it isn't the bus speed. There are prescalers to divide the clock speed from Bus clock to I²C clock (MAG3110 accepts I²C speed up to 400kHz) .
For example if you're using Processor Expert you can change the bus frequency by setting the I²C divider registers.
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