Pin definition of IMX6Dual.

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Pin definition of IMX6Dual.

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takashitakahash
Contributor III

When you pull down the pin with an external during reset, pull-down resistor value is recognized and may be set to be equal to or less than the maximum current value that the port can flow (= 1mA), but how about you?.

Dear community.

Our customer has below two questions.

i.MX6D is the terminal definition there are a number of pins becomes unstable during the reset.
For this reason, In pin becomes undefined, for the pin is connected to an external device, by the pull-up and pull-down process outside the i.MX, the intermediate potential will have a consideration so as not to occur during a reset.

For this pull-up / pull-down processing, please ask questions about 2 points.

[Question 1]

Will be externally pulled up the pins during reset itself is no problem?

If the pull up of power is PowerGroup pins with the same power supply,?

Example) to external pull-up voltage supply NVCC_SD1 NVCC_SD1 for the SD1_DAT3 pin Power group.

[Question 2]

When pull down the pin with an external during reset, pull-down resistor value is recognized and may be set to be equal to or less than the maximum current value that the port can flow (= 1mA).

Is it no probrem.

Thanks,

Best.

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Yuri
NXP Employee
NXP Employee

Hello,

  Please use the Datasheet(s) to know pin states just after reset.

For example, Table 100 (21 x 21 mm Functional Contact Assignments)

of IMX6DQCEC (Rev. 4, 07/2015) provides such information.

Also, please pay attention on Table 101 (Signals with Differing Before

Reset and After Reset States).

  Note, during power up sequence and short period of stabilization,

pin states are not defined. Moreover : “All I/O pins should not be externally
driven while the I/O power supply for the pin (NVCC_xxx) is OFF. This can
cause internal latch-up and malfunctions due to reverse current flows”.


Have a great day,
Yuri

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346 Views
Yuri
NXP Employee
NXP Employee

Hello,

  Please use the Datasheet(s) to know pin states just after reset.

For example, Table 100 (21 x 21 mm Functional Contact Assignments)

of IMX6DQCEC (Rev. 4, 07/2015) provides such information.

Also, please pay attention on Table 101 (Signals with Differing Before

Reset and After Reset States).

  Note, during power up sequence and short period of stabilization,

pin states are not defined. Moreover : “All I/O pins should not be externally
driven while the I/O power supply for the pin (NVCC_xxx) is OFF. This can
cause internal latch-up and malfunctions due to reverse current flows”.


Have a great day,
Yuri

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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