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Uboot sequence boot in T2080RDB with NOR Flash

Question asked by Aloui Zied on Jan 25, 2016
Latest reply on May 9, 2018 by ufedor

Hi everyone,


I work with the Qoriq T2080RDB Board, i don't have the Codewarrior Tap for debugging (I expected to be delivered) and neither the CodeWarrior development suite.

I just want to understand the boot sequence of Uboot in the Qoriq T2080rdb with the NOR Flash and the addressing mode (Physical or virtual address).


Her we have the Flash memory Map of Qoriq T2080RDB Board   :


128M NOR Flash memory Map


Start Address End Address Definition Max size

0xEFF40000 0xEFFFFFFF u-boot (current bank) 768KB

0xEFF20000 0xEFF3FFFF u-boot env (current bank) 128KB

0xEFF00000 0xEFF1FFFF FMAN Ucode (current bank) 128KB

0xEFE00000 0xEFE3FFFF PHY CS4315 firmware 256KB

0xED300000 0xEFEFFFFF rootfs (alt bank) 44MB

0xEC800000 0xEC8FFFFF Hardware device tree (alt bank) 1MB

0xEC020000 0xEC7FFFFF Linux.uImage (alt bank) 7MB + 875KB

0xEC000000 0xEC01FFFF RCW (alt bank) 128KB

0xEBF40000 0xEBFFFFFF u-boot (alt bank) 768KB

0xEBF20000 0xEBF3FFFF u-boot env (alt bank) 128KB

0xEBF00000 0xEBF1FFFF FMAN ucode (alt bank) 128KB

0xEBE00000 0xEBE3FFFF PHY CS4315 firmware (alt bank) 256KB

0xE9300000 0xEBEFFFFF rootfs (current bank) 44MB

0xE8800000 0xE88FFFFF Hardware device tree (cur bank) 1MB

0xE8020000 0xE86FFFFF Linux.uImage (current bank) 7MB + 875KB

0xE8000000 0xE801FFFF RCW (current bank) 128KB


We can see that U-boot is mapped at 0xEFF40000-0xEFFFFFFF and 0xEBF40000-0xEBFFFFFF in the NOR Flash memory. Why do we have 2 versions of uboot "current bank" and "alternative bank"?


According to the datasheet of the Processor E6500, at the power-up the CPU0 begin to execute his first instruction at the address 0xFFFF_FFFC that correspond at the Reset address.

But in Uboot the Reset vector is mapped at 0xEFFF_FFFC and not at 0xFFFF_FFFC, why is that? Do we use Physical address or Virtual address?


According to the dissembler code of U-boot, after the reset vector at 0xEFFF_FFFC, Uboot jump at the address 0xEFFF_0000 that correspond to the entry point "_start_e500" where he clear some register, setup the interrupt vector table, etc. After he finish the initialisation phase, U-boot jump to the address 0xEFF40000.

I want to know where the code of U-boot is executed in the NOR flash memory or in the DDR3 SDRAM memory?


When i use the command "md 0x00000100" in U-boot, do we visualise the NOR Flash memory or the DDR3 SDRAM memory? It's physical or Virtual address that we visualise?


When i use the command "bdinfo" in U-boot i have:

=> bdinfo

memstart    = 0x00000000

memsize     = 0x100000000

flashstart  = 0xE8000000

flashsize   = 0x08000000

flashoffset = 0x00000000

sramstart   = 0x00000000

sramsize    = 0x00000000

immr_base   = 0xFE000000

bootflags   = 0x00000000

intfreq     = 1799.820 MHz

busfreq     = 599.940 MHz

addressing  = 36-bit

ethaddr     = 00:0D:DD:DD:DD:DD

IP addr     =

baudrate    = 115200 bps

relocaddr   = 0x7FEF0000


In " addressing" we have 36 bits, this corresponds to what?

Does u-boot relocate himself at the address 0x7FEF0000? if yes, for what purpose?


Best Regards