We are developing an i.MX6 SOM that is designed to have common hardware for the SOLO, Dual, and Quad processors. We need to increase LDO_SOC to 1.225 to operate the VPU above 264MHz. Two questions have arisen,
1 - We noticed that there seems to be mention of reducing DDR jitter if LDO_SOC is 2.275V is this important?
2 - We were considering increasing the VDD_SOC_IN to 1.45V to margin the input above the drop in the internal LDO. Is this reasonable?
Thanks for your help,