Before starting a new design with an IMX6SoloX, I would like to know how to exchange around 10Ko between M4 and A9.
I want to use the M4 for real-time operation (1ms) and the A9 to do computation and HMI (Web Server, LCD, …).
I have planned to put Linux on an SD card and then running it on the DDR and using a quad SPI Flash for running FreeRTOS.
Does someone has test communication between A9 (Linux) and M4 (MQX or FreeRTOS) (for more than few octets)?
I will use precise location in DDR to exchange data (as a shared memory). But what will happen if the M4 try to write data in DDR in the same time that Linux is running in?
- Does it create latency or does writing operation will be canceled?
- Is there a hardware way to do this or should I use interrupts to prevent the other core that data exchange is in progress? I have not found information (or not understand) about RDC and precise state in case of collision occurs.
I also have a question about the simultaneous use of two different peripheral simultaneously.
I see in the reference manual that SPBA allow only one master to access the required peripheral.
But what’s happening for the other (does it create an interrupt, a wait state,…)?
Thanks a lot for your help.