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I2C configuration difference between MK10 and MK26

Question asked by Pascal Schröer on Jan 13, 2016
Latest reply on Jan 15, 2016 by Pascal Schröer



I have mentioned a strange behavior of the I2C module in MK26 derivates (MK26FN2M0VLQ18).


Last year, I have mainly used MK10DX128VLH7 and MK20DX128VLH7 Kinetis derivates. I could reuse the same I2C software for configuration / send / transmit functions in almost every project.


Now, I try to initialize the I2C module in the Kinetis MK26FN2M0VLQ18 derivate without any success. I'm not sure where the problem is based on. In my opinion there isn't any difference between the datasheets.



A hardware problem can be excluded because:

1.     I used a working I2C slave (BMP085 / Bosch) for my new project when I mentioned that there is a problem.

2.     I used the following pull-up resistors for scl and sda: 1 kOhm, 3k3, 4k7 and 10 k without any success.

3.     The electronic lead is shorter than 5 cm.

4.     I tried clock frequencies between 30 kHz and 100 kHz. (Max. slave frequency 100 kHz)

5.     The clock signal is how expected and the slew rate is excellent.


The picture below underlines my problem. I get middle voltage level when I suggest the acknowledge bit. So my slave isn't able to pull down the voltage level. (Independent of the pull-up resistor)

This missing acknowledge bit prohibit that I get the "receive acknowledge flag" and my conversation is not completed.



I tried to figure out why my (working) slave isn't able to pull down the voltage level. To get these information, I added a series resistor (1 kOhm) between the uC (sda) port and the slave (sda) port. Now, I can see two different sda signals. On the uC side, I see the sda signal without an acknowledge and on the slave side, I see the sda signal with an acknowledge (the middle voltage level are disappeared). So I can say, that there is a problem in my uC / or software.


To abbreviate I just post the first lines of code untill I get the error:


//Enable I2C0 clock



//Set Port B0 and B1 to ALT 2 (I2C0 / scl, sda)




//Initialize the I2C0 clock to 100kHz (60 MHz bus clock)

I2C0_F = 0x00

             |  I2C_F_ICR(0x2D)

             |  I2C_F_MULT(0x00);


//Enable the I2C0 module

I2C0_C1 = 0x00

               |  I2C_C1_IIEN_MASK;


//I2C start and master mode


while(I2C0_S & I2C_S_BUSY_MASK);

I2C0_C1  |=  I2C_C1_TX_MASK

                |    I2C_C1_MST_MASK;


//I2C transmit

//Send device address (write): 0xEE

I2C0_D = 0xEE;


//Wait for transmission complete

//Transmission complete?

while(!(I2C0_S & I2C_S_TCF_MASK));

//Interrupt flag?

while(!(I2C0_S & I2C_S_IICIF_MAKS));


//Wait for the receive acknowledge flag!

//This flag is never set, because of the middle voltage levels!!!

while(I2C0_S & I2C_S_RXAK_MASK);


Can anyone help me with this problem? Or has anyone tried out the MK26FN2M0VLQ18 processor?