I have a parallel LCD display that needs to be connected to IMX6Q SoC.
The LCD uses ILI9486L driver IC. This driver IC supports 8/9/16 data bus and MIPI-DBI protocol.
I've been researching for more than a week trying to configuring IPUv3 to support this LCD display (async smart display, sys80 bus, DBI commands) but no luck.
IP cores like ADC (async display controller) is not present on IMX6 unlike IMX53.
However, digging deeper into IMX6Q reference manual I found out MIPI-DSI host controller has full support for DBI protocol.
My question: is there a way to skip the serialization process of DSI host controller and redirect the parallel data out of the SoC, so that it can drive the LCD directly?