AnsweredAssumed Answered

i.MX6 CSI, BT.1120, 16-bit mode

Question asked by Marek Vasut on Jan 11, 2016
Latest reply on Jan 17, 2016 by Qiang Li - Mpu Se

Hi,

 

I'm implementing support for camera input on i.MX6 using mainline Linux 4.3-ish .

 

I am using an AnalogDevices ADV7181D video encoder, which is connected to the i.MX6Q CSI by using 16bit bus and I have HSync/VSync/PixClk connected. I have an FPGA inbetween, so I can fiddle with the bus wiring if necessary.

 

The ADV7181D generates 16bit data in YUV422 format, 8bit for Y and 8bit for Cr/Cb , both are transported in single clock tick. The data stream contains EAV/SAV codes. The data stream format from the ADV7181D is interlaced.

 

I am trying to determine the correct configuration of the CSI and the format of the datastream, so I can capture in 16bit bus mode with deinterlacing in the IPU.

 

Here is what I tried:

1) If the FPGA is parsing the EAV/SAV codes and generates HSync/Vsync based on them, I can capture in 16bit Non-Gated mode with generic data setting (CSI0_SENS_PRTCL=0x1 ; CSI0_SENS_DATA_FORMAT=0x3 ; CSI0_DATA_WIDTH=0x9). This would be perfect, but the problem is that the i.MX6Q does not have any sort of FRAME input signal, so sometimes the deinterlacing swaps top/bottom frame and the image is slightly distorted. Is there any FRAME input signal which would let the i.MX6 determine which frame is which during deinterlacing ?

 

2) If the FPGA works in pass-through mode, Hsync/Vsync are not connected AND the i.MX6 CSI is configured in BT1120/Interlaced/SDR, 16bit with generic data setting (CSI0_SENS_PRTCL=0x7 ; CSI0_DATA_WIDTH=0x9), I cannot capture data at all. I tried the following configurations,

but without success, the capture gets stuck:

2.1) Bus mapping: (ADV_D[15:0] <-> MX6_D[19:4]) OR  (ADV_D[15:0] <-> {MX6_D[19:12], MX6_D[9:2]})

2.2) CCIR code configuration:

        CCIR_CODE_3 = 0xff0000 ; CCIR_CODE_2 = 0x0 ; CCIR_CODE_1 = 0x40300 | CCIR_ERR_DET_EN

        OR

        CCIR_CODE_3 = 0xff0000 ; CCIR_CODE_2 = 0xd07df ; CCIR_CODE_1 = 0x40596 | CCIR_ERR_DET_EN

2.3) Sensor data format: CSI0_SENS_DATA_FORMAT=0x3 OR CSI0_SENS_DATA_FORMAT=0x2 OR CSI0_SENS_DATA_FORMAT=0x1

 

3) If the FPGA works in pass-through mode, Hsync/Vsync are not connected AND the i.MX6 CSI is configured in BT1120/Interlaced/SDR, 8bit with generic data setting (CSI0_SENS_PRTCL=0x7 ; CSI0_SENS_DATA_FORMAT=0x3 ; CSI0_DATA_WIDTH=0x1), I can capture, but the data are missing the Cr/Cb element.

 

Thus my question, how do I configure the CSI to capture 16bit BT1120 data with embedded EAV/SAV codes using the CSI ?

 

What shall be the format of EAV/SAV codes on the CSI bus when operating in 16bit mode, shall they be on the MSB of the bus only or shall they be on both MSB and LSB? I would like to understand in detail how the decoding of these AV codes work, so I can tweak the FPGA configuration to feed the i.MX6 the correct stuff.

Outcomes