i have a MC56F84769 controller. My bus clock is 50Mhz.
In the register ADC16_CFG1 I can select the clock divide settings (see below). The data sheet specifies that I need for 12Bit mode to keep inside 1.0 — 18.0Mhz.
If I change the divider settings between 4 and 8 during conversion my result changes although I am within the specified frequency.
(00 The divide ratio is 1 and the clock rate is input clock.
01 The divide ratio is 2 and the clock rate is (input clock)/2.
10 The divide ratio is 4 and the clock rate is (input clock)/4.
11 The divide ratio is 8 and the clock rate is (input clock)/8.)