in my project I need to disable eMIOS channels temporarily.
I have to generate arbitrary pulses. I setup a SAOC channel fed by timer bus A with the compare value and set EDPOL to 1 to generate the rising edge.
Then in the channel interrupt I clear EDPOL and setup the compare value for the falling edge.
If I leave the channel active additional compare interrupts occur (as expected) which I have to avoid because the output period can be longer than the timebase period.
How do I prevent these needless compare IRQs from occuring?
I tried the following things without success:
1.) Clear UCPREN / set FEN in the interrupt after the falling edge: No effect
2.) Clear FEN / set UCPREN after falling edge: Only every other edge occurs at all (even worse)
3.) Clear both UCPREN+FEN: Same as 2.)
4.) Setting corresponding bit in EMIOSUCDIS breaks the whole system. Somehow the IRQ request does not go away by its own and contineous interrupts occur.
Touching EMIOSMCR.GPREN is not an option I think, as the eMIOS module itself has to operate contineously.
What is my misconception on channel deactivation? Are there timing constraints I'm not aware of?
With best regards