I have a question about i.MX6DQ ESAI.
At first, please see Chapter 126.96.36.199 in IMX6DQRM Rev.3.
It shows about the restriction to set bit-clock frequency and register setting (DIV2, PSR and PM) for SSI in the NOTE.
I want to know whether ESAI has similar restriction or not.
I found the restriction when using exterrnal ESAI serial clock in the NOTE of Table 25-3.
But I did not find any restriction when using internal clock.
So I understand ESAI has no restriction for bit-clock frequency and register setting when using internal clock (Fsys or EXTAL) to its clock source.
In other words, I can set TPSR=1b, TPM=0x00, and TFP=0x0 in ESAI_TCCR register at the same time.
Is my understanding correct?