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Cann't boot T4240QDS-PB board,show "Waiting for D_INIT timeout. Memory may not work."

Question asked by leizhihua HDYUNF on Dec 26, 2015
Latest reply on Dec 30, 2015 by leizhihua HDYUNF

Hello everyone, I have just started working on a new T4240 QDS board. I have the board failing in the U-boot sequence immediately after detecting the DDR3 ram ("Waiting for D_INIT timeout. Memory may not work."). and the configuration switches and U-Boot booting log as below,and the three 8G DDR3-1866 UDIMM are installed in J23-D2_DIMM#1,

J22-D1_DIMM#1,J200-D3_DIMM#1,however I try to change the SW1 to 0x24,and update the bank4 Uboot to SDK-V1.8 and SDK-V1.9 version,but the issue same before,Any suggestions for this boot issue?thanks!

 

SW1= 0x17; SW2= 0xfe; SW3= 0x0c; SW4= 0x50; SW5= 0xe2; SW6= 0x0f; SW7= 0xea; SW8= 0xcd; SW9= 0x1f;

 

U-Boot 2013.01QorIQ-SDK-V1.5 (Dec 15 2013 - 18:54:15)

 

CPU0:  T4240E, Version: 2.0, (0x82480020)

Core:  E6500, Version: 2.0, (0x80400120)

Clock Configuration:

       CPU0:1666.667 MHz, CPU1:1666.667 MHz, CPU2:1666.667 MHz, CPU3:1666.667 MHz,

       CPU4:1666.667 MHz, CPU5:1666.667 MHz, CPU6:1666.667 MHz, CPU7:1666.667 MHz,

       CPU8:1666.667 MHz, CPU9:1666.667 MHz, CPU10:1666.667 MHz, CPU11:1666.667 MHz,

       CCB:733.333 MHz,

       DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:183.333 MHz

       FMAN1: 733.333 MHz

       FMAN2: 733.333 MHz

       QMAN:  366.667 MHz

       PME:   533.333 MHz

L1:    D-cache 32 kB enabled

       I-cache 32 kB enabled

Reset Configuration Word (RCW):

       00000000: 16070019 18101916 00000000 00000000

       00000010: 04383060 30548c00 ec020000 f5000000

       00000020: 00000000 ee0000ee 00000000 000307fc

       00000030: 00000000 00000000 00000000 00000028

Board: T4240QDS, Sys ID: 0x1e, Sys Ver: 0x14, vBank: 0

FPGA: v6 (T4240QDS_2014_0211_1852), build 547 on Wed Feb 12 00:52:40 2014

SERDES Reference Clocks: SERDES1=125MHz SERDES2=125MHz SERDES3=100MHz SERDES4=100MHz

I2C:   ready

SPI:   ready

DRAM:  Initializing....using SPD

Detected UDIMM                  

Detected UDIMM                  

Detected UDIMM                  

Waiting for D_INIT timeout. Memory may not work.

22 GiB left unmapped

    DDR: 24 GiB (DDR3, 64-bit, CL=13, ECC on)

       DDR Controller Interleaving Mode: 3-way 4KB

       DDR Chip-Select Interleaving Mode: CS0+CS1

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