We will use the MK22FN128 MCU with 20 MHz external crystal, and set core clock to 100 MHz in FEE mode.
I believe that we can set core clock to 100 MHz as below.
- FLL reference clock = 39.0625KHz (= 20 MHz / 512)
- FLL DCO output clock = 39.0625KHz * 2560 = 100MHz.
As you know, the maximum FLL reference frequency range is 39.0625 KHz.
Can I use crystal which 50 ppm frequency tolerance?
Because frequency of crystal is 20 MHz +/- 1 KHz and FLL reference clock is 39.0625 KHz +/- 1.95 Hz, some case exceed 39.0625 KHz.
Then I want to make sure that I can use 50 ppm crystal or not.
Please reply as soon as possible.