Our partner have a question about i.MX6S IPU IDMAC.
They want to use VDIC de-interlacing processing, but it has not worked well.
Then, we are checking IDMAC setting.
Please see Table 38-29 in IMX6SDLRM Rev.2.
For de-interlacing, IDMAC_CH_5, 9, 10, and 13 should be enabled.
Next, please see Table 38-9, ch 8 seems to be also needed not only ch 5, 9, 10, and 13.
Should we enabled ch 8 also?
Actually, ch 0 in Table 38-9 is enabled now.
To use VDIC de-interlacing, should we disable ch 0 to prevent collision?
Or we can ignore it?