MX6DL supports DDR3 address mirror，I have read lot of documents，but I have some problems about this feature：
1.This feature only can be applied to the second Rank. why?
2. And our board has one Rank, I have enabled this feature, I didn't find some bugs,Could I open this feature?
3. For this feature, the addr lines: A3,A4; A5,A6; A7,A8; BA0,BA1; they connect to each other, Why doesn't the W/R operation make any error? Actually,I can't understand why do these pin can connect to each other?
Please help me,thank you ~