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DSPI2 on Vybrid Linux 3.0.15 Kernel

Question asked by Andreas Lie on Dec 11, 2015
Latest reply on Jan 18, 2016 by Andreas Lie

Hello.

 

We are using Yocto and Timesys BSP to build our custom Linux BSP. (Kernel 3.0.15)

Our board is based on the Vybrid VF65GS10.

 

We want to use DSPI2 on the vybrid, but are unsuccessful in doing so.

The kernel boots properly, we have added iomuxing according to the reference manual, initialized dspi2 and spidev driver.

We  have enabled the clock for dspi2.

When we test the SPI Bus from userspace (e.g. echo "hello world" >> /dev/spidev2.0) we can see the chipselect toggling, but goes high again immediately after 1 microsecond. The clock goes from high to low, but never changes afterwards.

Data lines show nothing.

 

Any hints or tips would be gladly appreciated.

 

For reference, some of our modifications are already discussed in posts;

DSPI drive usage in Linux Side

Re: SPI Driver on Linux Side

 

Our BSP alterations:

 

arch/arm/mach-mvf/clock.c

 

static struct clk dspi_clk[] = {
         {
         __INIT_CLK_DEBUG(dspi0_clk)
         .id = 0,
         .parent = &ipg_clk,
         .enable_reg = MXC_CCM_CCGR0,
         .enable_shift = MXC_CCM_CCGRx_CG12_OFFSET,
         .enable = _clk_enable,
         .disable = _clk_disable,
         },
         {
         __INIT_CLK_DEBUG(dspi1_clk)
         .id = 1,
         .parent = &ipg_clk,
         .enable_reg = MXC_CCM_CCGR0,
         .enable_shift = MXC_CCM_CCGRx_CG13_OFFSET,
         .enable = _clk_enable,
         .disable = _clk_disable,
         },
         {
         __INIT_CLK_DEBUG(dspi2_clk)
         .id = 2,
         .parent = &ipg_clk,
         .enable_reg = MXC_CCM_CCGR6,
         .enable_shift = MXC_CCM_CCGRx_CG12_OFFSET,
         .enable = _clk_enable,
         .disable = _clk_disable,
         },
};

 

..

 

//      _REGISTER_CLOCK("mvf-dspi.0", NULL, dspi_clk[0]),
        _REGISTER_CLOCK("mvf-dspi.2", NULL, dspi_clk[2]),

 

arch/arm/plat-mxc/include/mach/iomux-mvf.h

 

//   #define MVF600_DSPI_PAD_CTRL    (PAD_CTL_SPEED_LOW | PAD_CTL_DSE_25ohm)
     #define MVF600_DSPI_PAD_CTRL    (PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_20ohm | PAD_CTL_ODE | PAD_CTL_PUS_100K_UP | PAD_CTL_PKE
          | PAD_CTL_PUE)


/*DSPI0*/
#define MVF600_PAD41_PTB19__DSPI0_PCS0                          \
                 IOMUX_PAD(0x00A4, 0x00A4, 1, 0x0000, 0, \
                                 MVF600_DSPI_PAD_CTRL | PAD_CTL_OBE_ENABLE)
#define MVF600_PAD42_PTB20__DSPI0_SIN                           \
                 IOMUX_PAD(0x00A8, 0x00A8, 1, 0x0000, 0, \
                                 MVF600_DSPI_PAD_CTRL | PAD_CTL_IBE_ENABLE)
#define MVF600_PAD43_PTB21__DSPI0_SOUT                          \
                 IOMUX_PAD(0x00AC, 0x00AC, 1, 0x0000, 0, \
                                 MVF600_DSPI_PAD_CTRL | PAD_CTL_OBE_ENABLE)
#define MVF600_PAD44_PTB22__DSPI0_SCK                           \
                 IOMUX_PAD(0x00B0, 0x00B0, 1, 0x0000, 0, \
                                 MVF600_DSPI_PAD_CTRL | PAD_CTL_OBE_ENABLE)


/*DSPI2*/
#define MVF600_PAD64_PTD30__DSPI2_PCS0                           \
                 IOMUX_PAD(0x0100, 0x0100, 5, 0x0000, 0, \
                                 MVF600_DSPI_PAD_CTRL | PAD_CTL_OBE_IBE_ENABLE)
#define MVF600_PAD65_PTD29__DSPI2_SIN                            \
                 IOMUX_PAD(0x0104, 0x0104, 5, 0x0000, 0, \
                                 MVF600_DSPI_PAD_CTRL | PAD_CTL_OBE_IBE_ENABLE)
#define MVF600_PAD66_PTD28__DSPI2_SOUT                           \
                 IOMUX_PAD(0x0108, 0x0108, 5, 0x0000, 0, \
                                 MVF600_DSPI_PAD_CTRL | PAD_CTL_OBE_IBE_ENABLE)
#define MVF600_PAD67_PTD27__DSPI2_SCK                            \
                 IOMUX_PAD(0x010C, 0x010C, 5, 0x0000, 0, \
                                 MVF600_DSPI_PAD_CTRL | PAD_CTL_OBE_IBE_ENABLE)

 

arch/arm/mach-mvf/board-twr-vf700.c

 

   /*DSPI0*/
     /*
        MVF600_PAD41_PTB19__DSPI0_PCS0,
        MVF600_PAD42_PTB20__DSPI0_SIN,
        MVF600_PAD43_PTB21__DSPI0_SOUT,
        MVF600_PAD44_PTB22__DSPI0_SCK,
    */
       
    /*DSPI2*/
        MVF600_PAD64_PTD30__DSPI2_PCS0,
        MVF600_PAD65_PTD29__DSPI2_SIN,
        MVF600_PAD66_PTD28__DSPI2_SOUT,
        MVF600_PAD67_PTD27__DSPI2_SCK

 

..

 

static struct spi_mvf_chip generic_chip_info = {
        .mode = SPI_MODE_2,
        .bits_per_word = 16,
        .void_write_data = 0,
        .dbr = 0,
        .pbr = 0,
        .br = 0,
        .pcssck = 0,
        .pasc = 0,
        .pdt = 0,
        .cssck = 0,
        .asc = 0,
        .dt = 0,
   
};

static struct spi_board_info mvf_spi_board_info[] __initdata = {
        {   
                // The modalias must be the same as spi device driver name
                //.modalias = "m25p80",
                .modalias = "spidev",
                .max_speed_hz = 1000000,
                .bus_num = 2,
                .chip_select = 0,
        //.platform_data = &at26df081a_platform_data,
                .controller_data = &generic_chip_info
        },
};

 

..

 

 // dspi
        mvf_add_dspi(2, &mvf_vf600_spi_data);
        spi_device_init();

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