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DDR Calibration test

Question asked by Saida S on Dec 10, 2015
Latest reply on Dec 17, 2015 by Saida S

hi I.mx6 community

my ddr calibration and stress test both are failed

how to solve that ?

can any one give me the exact procedure how to do that if i am doing wrong .

go 0x907000

 

## Starting application at 0x00907000 ...

 

 

============================================

        DDR Stress Test (2.3.0)

        Build: Nov 20 2015, 16:05:41

        Freescale Semiconductor, Inc.

============================================

 

============================================

        Chip ID

CHIP ID = i.MX6 Solo/DualLite (0x61)

Internal Revision = TO1.2

============================================

 

============================================

        Boot Configuration

SRC_SBMR1(0x020d8004) = 0x02008000

SRC_SBMR2(0x020d801c) = 0x3a000001

============================================

 

What ARM core speed would you like to run?

Type 1 for 800MHz, 2 for 1GHz

ARM Clock set to 800MHz

 

============================================

        DDR configuration

BOOT_CFG3[5-4]: 0x00, Single DDR channel.

DDR type is DDR3

Data width: 64, bank num: 8

Row size: 15, col size: 10

Chip select CSD0 is used

Density per chip select: 2048MB

============================================

 

Current Tempareture: 33

============================================

 

Please select the DDR density per chip select (in bytes) on the board

Type 0 for 2GB; 1 for 1GB; 2 for 512MB; 3 for 256MB; 4 for 128MB; 5 for 64MB; 6 for 32MB 

For maximum supported density (4GB), we can only access up to 3.75GB.  Type 7 to select this

  DDR density selected (MB): 2048

 

Would do you want run DDR Calibration? Type 'y' to run and 'n' to skip

 

Calibration will run at DDR frequency 400MHz. Type 'y' to continue.

If you want to run at other DDR frequency. Type 'n'

  Please enter the MR1 value on the initilization script

  This will be re-programmed into MR1 after write leveling calibration

  Enter as a 4-digit HEX value, example 0004, then hit enter

0000DDR Freq: 396 MHz

 

ddr_mr1=0x00000000

Start write leveling calibration...

running Write level HW calibration

Write leveling calibration completed, update the following registers in your initialization script

    MMDC_MPWLDECTRL0 ch0 (0x021b080c) = 0x0049004F

    MMDC_MPWLDECTRL1 ch0 (0x021b0810) = 0x004B004F

    MMDC_MPWLDECTRL0 ch1 (0x021b480c) = 0x00670067

    MMDC_MPWLDECTRL1 ch1 (0x021b4810) = 0x00620105

Write DQS delay result:

   Write DQS0 delay: 79/256 CK

   Write DQS1 delay: 73/256 CK

   Write DQS2 delay: 79/256 CK

   Write DQS3 delay: 75/256 CK

   Write DQS4 delay: 103/256 CK

   Write DQS5 delay: 103/256 CK

   Write DQS6 delay: 133/256 CK

   Write DQS7 delay: 98/256 CK

 

Starting DQS gating calibration

. . . . . . . . . . . . . . ERROR FOUND, we can't get suitable value !!!!

dram test fails for all values.

 

Error: failed during ddr calibration

 

###########################################

 

my test is failed even though SI  analysis for DDR is cleared

i am following this procedure

1.i am able to download u-boot through ARM DS-5 with init script  from Sabresd board.

2.in u-boot i am downloading ddr-test-uboot-jtag-mx6dl.bin file to 0x907000 and ruuning

3.test failed as i shown above

 

how to solve this ?

thanks and regards

Saida

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