Where is the DCSR located in the T2080? The RM references it but doesn't define it in the CCSR space. I see reference in some code that I have to a separate "DEBUGRM". Does that exist for the T2080?

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Where is the DCSR located in the T2080? The RM references it but doesn't define it in the CCSR space. I see reference in some code that I have to a separate "DEBUGRM". Does that exist for the T2080?

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glenfujimori
Contributor I

Where is the DCSR located in the T2080? The RM references it but doesn't define it in the CCSR space.  I see reference in some code that I have to a separate "DEBUGRM". Does that exist for the T2080?

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LPP
NXP Employee
NXP Employee

DCSR related information is covered by QorIQ Debug RM. It is available under NDA.

Support is limited to 3rd Party Tool vendors. Customers wishing to use this feature set are enabled via CW and 3rd party tools. Customers can use CodeWarrior Trace Tool or may also check with Lauterbach, Green Hills and Wind River.

Customers can also use the QorIQ Debug RM feature set without CW or 3rd party tools. They should contact FSL to engage in a service contract to be enabled with SPID Library. SPID Library is an API which enables SW manipulation of the QorIQ Debug feature set. SPID simplifies setting up and collecting HW counter information.


Have a great day,
Pavel

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sinanakman
Senior Contributor III

Hi LPP

Is it possible to have a copy of Debug RM without support. We

are under NDA.

Thanks

Sinan Akman

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LPP
NXP Employee
NXP Employee

Unfortunately,  we can't provide this documentation via regular support.

Separate NDA for debug functions is needed.

You need to contact local FSL office or FAE about this feature.


Have a great day,
Pavel

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sinanakman
Senior Contributor III

Hi Glen

The DCSR can be mapped into the local memory

space by specifying the DCSR space as a LAW target.

Please take a look at the section 2.4.3 LAWn Attribute

Register on page 138 and see the TGRT_IDs in

Table 2-1on page 128 (a LAW_LAWAR with target

id of 1Dh will map to DCSR). From the Notes in

that table : "The debug facilities are accessed

through a DCSR mapped LAW".

Hope this helps

Regards

Sinan Akman

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glenfujimori
Contributor I

Hi Sinan,

OK, I understand that the DCSR registers are setup this way – like the QMAN and BMAN are using the LAWs as well. However, where are the DCSR registers defined? What document? I can’t seem to locate that information for the T2080.

Thanks,

Glen

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sinanakman
Senior Contributor III

Hi Glen

As Pavel indicates above DCSR is not explained in SoC Reference Manual.

All those debug registers are probably explained in the debug manual

called Advanced QorIQ Debug and Performance Monitoring".

However please note what Pavel explains : this document is only

available to third party debug tool partners, requires a special NDA

and should be requested via local FAE.

I have to add that, we have been through this process several times and it

ends up no where. This usually results first in a message that tells they

are not interested in another Debug Partner and then a call from product

manager offering a special and expensive support option that would include

accessing this document. Therefore I asked Pavel above specifically if

this document is available without a support. Unfortunately when it comes

to this the whole process is pretty fruitless.

Your mileage might vary so please contact to your local FAE as Pavel suggests

and hopefully you will be given access to the documents you need to do your

work.

Regards

Sinan Akman

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glenfujimori
Contributor I

Hi Sinan,

Thanks for the answers, now this all makes sense. Perhaps an updated to the T2080RM would help in the future with other customers.

Regarding NDA, I work for Wind River so that is no issue. We probably already have the debug rm in house.

If I can’t get it can you tell me what’s included in that register set? In the project I am currently on we are going to have to access performance monitor registers. Would that be in that register set? I saw in the eref and 6500 eref that there are some perfmon SPRs covered there.

Thanks for the answers.

Glen

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