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Power on reset sequence

Question asked by Rachana T M on Dec 7, 2015
Latest reply on Dec 7, 2015 by LPP

Hi,

We are using P1022NXN2LFB processor in our design. After power on, HRESET_B will be deasserted as it is pulled up. Once all the power supplies and system clock are stable, HRESET_B gets asserted by an active device for a minimum of 25us. Please let me know whether this scheme work?  or is it required to deassert all the supplies and SYS_CLK once HRESET_B gets asserted by an active device after power on and to assert power supplies, system clock and HRESET_B in sequence.

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