Loris Caren

M5235EVB Performance

Discussion created by Loris Caren on Feb 6, 2008
Latest reply on Feb 7, 2008 by stzari
I've just measured the performance of a sample of code (that does some scanf/sprintf operations) on the M5235EVB and compared them to an existing 16MHz 68331 system running from an 8 bit EPROM.
I'm now panicing because I only measure a 6-8 times performance improvement. Is this, rather than the 30 times or more improvement I had expected what I should be seeing, and if not, what could be going wrong?
I'm loading my code into the external SRAM which seems to be 32 bit wide.
I'm not altering any of the bus timings set by the dBUG or fiddling with the cache. Does dBUG start the cache?
I've measured 75MHz on the CPU clock o/p test point, so the processor seems to be set by dBUG to run as fast as it can.

AN2866 quotes the 5235 at 144 MIPS and a 68332 at 25MHz at 7.5 MIPS. Derating this for my 16MHz 331 suggests I should see a 30 fold increase, and I had expected perhaps another x2 or x4 for the difference in bus width.