i.MX6DL internal LDO is voltage level invert when power off and shutdown.

[takashitakahash]

Hi. community.

Our customer has below question.

When such as power supply OFF and power supply interruption, although there are cases where the input and output voltages of i.MX internal LDO is reversed,

what there problem.

Please tell me the LDO of the subject when there is a limit

[I.MX internal LDO]

LDO_ARM, LDO_SOC, LDO_PU, LDO_2P5, LDO_1P1, LDO_SNVS, LDO_USB.

Please refer attachment Fig.

By the way, the reversal of input power level when the power OFF of LDO there are in the spec?

[igorpadykov]

Hi Takashi

there are no specs on LDOs "reversal of input power level"

and reversal current limits. However no damage will occur with "reversal"

bearing in mind that output FETs are quite powerful (several Ampers)

and typical LDO schematic :

Low-dropout regulator - Wikipedia, the free encyclopedia

Best regards

igor

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