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imx6sx fec RMII ENET1_REF_CLK1

Question asked by Baertsch Peter on Nov 27, 2015
Latest reply on Dec 5, 2015 by Baertsch Peter

Hello

 

I want to configure the ENET1_TX_CLK pin as ENET1_REF_CLK1 with 50Mhz for the phy. In u-boot it works. But not in kernel.

 

DTS config:

&fec1 {

    pinctrl-names = "default";

    pinctrl-0 = <&pinctrl_enet1>;

    pinctrl-assert-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>, <&gpio1 10 GPIO_ACTIVE_LOW>;

    phy-mode = "rmii";

    status = "okay";

};

 

pinctrl_enet1: enet1grp {

    fsl,pins = <

        MX6SX_PAD_ENET1_MDIO__ENET1_MDIO    0xa0b1

        MX6SX_PAD_ENET1_MDC__ENET1_MDC        0xa0b1

        MX6SX_PAD_ENET1_CRS__ENET1_CRS         0xa0b1

        MX6SX_PAD_ENET1_TX_CLK__ENET1_REF_CLK1  0x0051

        MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0    0xa0b1

        MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1    0xa0b1

        MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN    0xa0b1

        MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0    0x3081

        MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1    0x3081

    >;

};

 

I change in the mach-imx6sx.c file IMX6SX_GPR1_FEC_CLOCK_PAD_DIR_MASK to "1"

 

static void __init imx6sx_enet_clk_sel(void)

{

    struct regmap *gpr;

 

    gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr");

    if (!IS_ERR(gpr)) {

        regmap_update_bits(gpr, IOMUXC_GPR1,

                   IMX6SX_GPR1_FEC_CLOCK_MUX_SEL_MASK, 0);

        regmap_update_bits(gpr, IOMUXC_GPR1,

                   IMX6SX_GPR1_FEC_CLOCK_PAD_DIR_MASK, 1);

    } else {

        pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n");

    }

}

 

 

What should I do?

 

Peter

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