Dear all,
Hello.
I have a question about interrupt priority in i.MX6Q.
In IMX6DQRM, chapter 2, table2-1 system memory map it gives us the interrupt controller and interrupt distributor registers' address range, but I cannot find the definition about these registers.
Similarly it only gives us the registers’ address about interrupt priority in BSP, besides there is no useful information to this question.
[Q1]
I wonder how to config interrupt priority.
Best regards.
Hi li
this is described in GIC Architecture Specification from ARM (www.arm.com)
or look at attached document from SDK Chapter 4 Configuring the GIC Driver
Best regards
igor
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Hi
Thanks for your help. I have looked at the document, but I still cannot deal with it.
In the file vxbArmGenIntCtrl.c, it gives some information as follows,
"
Optinally, the interrupt priority and sensitivity can be set as below in hwconf:
\cs
LOCAL const struct intrCtlrPriority armGICPriority[] = {
{ INT_PIN_TIMER, INT_PRI_TIMER_0},
{ INT_PIN_UART, INT_PRI_UART_1 },
{ INT_PIN_DMA, INT_PRI_SDMA },
{ INT_PIN_END, INT_PRI_FEC },
};
\ce
"
Also in BSP of imx31,imx35,imx51,imx53, ect, this method has been used. I try to add my own code in hwconf.c like this.
"
struct intrCtlrPriority imx6Priority[] =
{
/* pin, priority */
{IMX_INT_GPIO1, 15},
{IMX_INT_GPIO2, 1},
};
const struct hcfResource imx6IntCtlrResources[] =
{
{ "regBase", HCF_RES_INT, {(void *)ARM_GIC_BASE}},
{ "intMode", HCF_RES_INT, {(void *)INT_MODE}},
{ "input", HCF_RES_ADDR, {(void *)&armGicInputs[0]}},
{ "inputTableSize", HCF_RES_INT, {(void *)NELEMENTS(armGicInputs)}},
{ "priority", HCF_RES_ADDR, {(void *)&imx6Priority[0]}},
{ "priorityTableSize", HCF_RES_INT, {(void *)NELEMENTS(imx6Priority)}},
};
#define imx6IntCtlrNum NELEMENTS(imx6IntCtlrResources)
const struct hcfDevice hcfDeviceList[] = {
{"vxbImx6IntCtrl", 0, VXB_BUSID_PLB, 0, imx6IntCtlrNum, imx6IntCtlrResources},
...
"
But it I could get what i want. Could I do like this? And where is my problem?