iMX6DL Pad's condition during Reset

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iMX6DL Pad's condition during Reset

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claes-henryaron
Contributor I

The pad's out of reset condition is clearly stated in the data sheet. But I can not find any information of the pad's condition (state) during reset.

Please assume that "all" power rails are stable (on). What will the pad's condition (state) be during the assertion (low) of SRC_POR_B (cold reset)?

Regards

Claes-Henry

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igorpadykov
NXP Employee
NXP Employee

>iMX6SDLIEC data sheet (Table 92 and text) does not explain the pad state during reset, only before and after reset.

iMX6SDLIEC "before reset" means  "DURING reset" in iMX6DQCEC data sheet

Best regards

igor

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igorpadykov
NXP Employee
NXP Employee

Hi Claes-Henry

pad settings are the same as after reset, with exceptions

described on Table 101. Signals with Differing Before Reset and After Reset States

i.MX6DQ Datasheet (rev.4, 7/2015)

http://cache.freescale.com/files/32bit/doc/data_sheet/IMX6DQCEC.pdf

Best regards

igor

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claes-henryaron
Contributor I

Hi,

The data sheet referred to is of the iMX6DQCEC, and defines the pad's conditions also during reset.

I am using the iMX6SDLIEC and it's datasheet (Rev. 5) does not explain the pad's conditions during reset. It only defines conditions/states before and after Reset.

Can I assume that the description in the DQ data sheet also is valid for the SDL processors?

In my particular design it is the EIM_CS1, EIM_OE, EIM_CS0, EIM_RW and EIM_LBA, that possibly will cause extra design activities for me. They are all Output High after Reset.

Will they be Output High also during Reset (when SRC_RES_B is held Low)?

Best Regards

Claes-Henry

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igorpadykov
NXP Employee
NXP Employee

for iMX6SDLIEC and it's datasheet (Rev. 5) please look at

Table 92. Signals with Differing Before Reset and After Reset States,

other pad properties are the same.

Best regards

igor

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claes-henryaron
Contributor I

Hi,

iMX6DQCEC data sheet (Table 101 and text) explicity explains the pad state DURING reset, as well as before and after reset.

iMX6SDLIEC data sheet (Table 92 and text) does not explain the pad state during reset, only before and after reset.

Do the data sheet differ because of the iMX6SDLIEC data sheet not having been updated yet, or do they differ beacuse of different pad behaviour DURING reset (from SRC_POR_B asserted low, until SRC_POR_B de-asserted high)?

Are the iMX6SDLIEC pad states DURING reset the same as after reset (except for the pads listed in table 92)?

Best Regards

Claes-Henry

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igorpadykov
NXP Employee
NXP Employee

>iMX6SDLIEC data sheet (Table 92 and text) does not explain the pad state during reset, only before and after reset.

iMX6SDLIEC "before reset" means  "DURING reset" in iMX6DQCEC data sheet

Best regards

igor