Hi,
can someone explain to me how to set up PCIe clocks in device tree. My custom board with i.MX6DL provides an 125MHz LVDS clock to CLK1 as recommended in the "HW Design Checking List for i.MX6DQSDL".
Unfortunately I have no idea, how to set up device tree for this configuration. I assume at least one of the clocks must be "IMX6QDL_CLK_LVDS1_IN" but which ones?
Additionally, the default setup uses "IMX6QDL_CLK_SATA_REF_100M" for "ref_100m". I am not sure whether this clock is available in i.MX6DL as there is no SATA in i.MX6DL.
As the external PCIe-REFCLK is recommended, there should be some boards using it. Perhaps someone can share his device tree sources with the proper setup of the clocks.
Best regards,
Martin
Hello,
Basically there are several options for generating clock for i.MX6 PCIe module,
please look at PCIE_AXI_CLK_ROOT Figure 18-2 "Clock Tree" i.MX6DQ
Reference Manual. IMX6 PCIe module requires 125MHz clock for normal
operation - all other clocks it produces internally - please refer to section 18.5.1.3.6
"Ethernet PLL", it describes Ref_PCIe =125 MHz. Note, 100 MHz PCIe reference
clock is generated from this clock internally.
Also, You may look at the following
[PATCH 4/4] ARM i.MX6: Add PCI Express to device tree
Have a great day,
Yuri
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