FXAS21002 FIFO timing issue, ODR seem to be faster than datasheet spec.

[riscypayne]

Hi

I'm using FXAS21002 on LPC1549 with written code that drive I2C interface. It configured to use 32 FIFO with watermark setting 32, the code working fine on circular loop mode excepts that it took 2.1 second before INT (interrupt) occurred which invoke LPC1549 to extract data.

I expected 2.56 Second based on ODR 12.5Hz.

I reviewed the datasheet and check ODR tolerance which is +/-2.5% which ruled out.....so I not sure what happening here.

I have data result X,Y,Z and seem to be working fine, I did rotation test on device and it should good reading. 

I could not check status reg from the FXAS because it crash I2C if attempting to transfer data correctly, so I had to limit I2C only for data transfer and stop operation. 

Below is the config setting.

zFXASSTATE.FIFO_IsEnabled=1;

I2C_Set_Device_FXAS21002();

FXAS_Standby();

I2C_Write_Register_Byte(G_CTRL_REG1, 0x40);                     // Reset all registers to POR values

zDelay_5mSec();

I2C_Write_Register_Byte(G_F_SETUP, 0b10100000);                // 32 Count and Circular Mode

I2C_Write_Register_Byte(G_INT_SRC_FLAG, 0b00000100);     // Select SRC_FIFO as source interrupt

I2C_Write_Register_Byte(G_CTRL_REG0, 0b00000011);           // LPF = 256Hz, HPF disabled, HPF cutoff frequency = N/A, +/-250 dps range -> 7.8125 mdps,

I2C_Write_Register_Byte(G_CTRL_REG2, 0b11000010);           // Enable FIFO interrupt, mapped to INT1 - PTA5, push-pull, active low interrupt

I2C_Write_Register_Byte(G_CTRL_REG1, 0b00011100);           // ODR = 25Hz, Standby mode

I2C_Write_Register_Byte(G_CTRL_REG3, 0b00001000);           // WRAPTOONE=1 for FIFO method.

I calculated that it should take less than 5mSec for I2C to complete data transfer 192 byte worth. 6 8 32 = 192 byte which well within the next sample timing to complete the transfer.

[TomasVaverka]

Hi Riscy,

I have just tried to reproduce your settings (FIFO in circular mode, watermark set to 32 samples, ODR set to 12.5 Hz) and as you can see below, the FIFO interrupt raises correctly every 2.559 s (80 ms x 32 samples).

void FXAS21002C_Init (void)
{
  I2C_WriteRegister(FXAS21002C_I2C_ADDRESS, GYRO_F_SETUP_REG, 0x60);    // Circular buffer mode, set watermark to 32 samples
  I2C_WriteRegister(FXAS21002C_I2C_ADDRESS, GYRO_CTRL_REG0, 0x03);      // LPF = 4Hz, HPF disabled, +/-250 dps range -> 7.8125 mdps/LSB = 128 LSB/dps
  I2C_WriteRegister(FXAS21002C_I2C_ADDRESS, GYRO_CTRL_REG2, 0xC0);      // Enable FIFO interrupt, mapped to INT1 - PTA5, push-pull, active low interrupt
  I2C_WriteRegister(FXAS21002C_I2C_ADDRESS, GYRO_CTRL_REG3, 0x08);      // The auto-increment address of the OUT_Z_LSB register is 0x01 - OUT_X_MSB register
  I2C_WriteRegister(FXAS21002C_I2C_ADDRESS, GYRO_CTRL_REG1, 0x1E);      // ODR = 12.5Hz, Active mode
}

It is hard to say where the problem is, if you have a logic analyzer, can you please also share here the collected data? Are you experiencing the same problem at different ODRs or without using FIFO?

Regards,

Tomas

PS: If my answer helps to solve your question, please mark it as "Correct". Thank you.