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imx6solo based custom board u-boot bringup issue ?

Question asked by robin singh on Nov 20, 2015
Latest reply on Dec 17, 2015 by Ganesh Biradar

Hi all,

 

I am trying to bring up the u-boot on our custom board based on imx6solo, but no luck , below are the steps(questions too)

which i have done till now. please give me some feedback/suggestion for debugging or possible change i might have missed.

 

1) Completed Stress test with v2.20  successfully  and generated DDR setting, attached  are updated *.inc, and .cfg  file with calibration result.

does it look fine or i missed something ?   

 

2) I referenced this  "board/freescale/mx6sabresd/" directory for porting to my board

   a) created   "board/freescale/mx6smyboard/"  - a copy of "board/freescale/mx6sabresd/"

   b) created a new config file for my DDR - "mx6s_h5tc4g63cfr_pba.cfg" with new calibration tool result. - attached.

   c) modified code in mx6sabresd.c for my board e.g UART1 and SDHC3 for 4 bit support.

         UART1:

                  MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),

                 MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), };

       USDHC3:

           usdhc3_pads[] = {

                MX6_PAD_SD3_CLK__SD3_CLK   | MUX_PAD_CTRL(USDHC_PAD_CTRL),

                MX6_PAD_SD3_CMD__SD3_CMD   | MUX_PAD_CTRL(USDHC_PAD_CTRL),

                MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),

                MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),

                MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),

                MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),

                MX6_PAD_SD3_DAT4__GPIO7_IO01    | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */

               };

      for card detection pin changed :

                 #define USDHC3_CD_GPIO IMX_GPIO_NR(7, 1)

    d)  In  "board_mmc_init" added  below line for 4 bit support.

                usdhc_cfg[0].max_bus_width = 4;

                usdhc_cfg[1].max_bus_width = 4;

                usdhc_cfg[2].max_bus_width = 4;

   e) created config referenced from

          include/configs/mx6sabre_common.h

          include/configs/mx6sabresd.h

                disabled  #undef CONFIG_EXTRA_ENV_SETTINGS  - just to avoid compilation error and

               

    f) created u-boot.imx image and flashed on the SD card by using :

       dd if=u-boot.imx of=/dev/sde bs=1k seek=1 conv=fsync

        is it correct  command ?

 

  am i still missing any possible changed required in u-boot ?

 

3) How  can i verify whether my CPU is reading the image from SD card or not ?

 

4) what kind of debugging method i can try to trace my code running location on this platform ?

 

5) is the below files are getting used in u-boot for initialization ?

           a ) arch/arm/cpu/armv7/start.S

           b) arch/arm/cpu/armv7/lowlevel_init.S

       I tried to put a debug loop in "arch/arm/cpu/armv7/start.S "

        for making GPIO16 status changed but nothing seems to work , is it the right file to put such kind of debugging code ?   

code snippet :  

                    bl cpu_init_crit

                    bl  cpu_init_loop

 

               ENTRY(cpu_init_loop)    

                       ldr r0, =IOMUXC_BASE_ADDR

                       ldr r1, =0x00000000

                       str r1, [r0, #0x5e4]

                       b       cpu_init_jmd_loop         

               ENDPROC(cpu_init_loop)

      

please give me some feedback ?

 

Thanks in advance.

 

- Robin

 

 

===============================================================================

Memory  specification :

Manufacturer: Hynix             

Device Part Number: H5TC4G63CFR-PBA  (2 chip we are using 512MB+512MB)

Clock Freq.: 400MHz

Density per CS in Gb: 8

Chip Selects used: 1

Number of Banks: 8

Row address: 15

Column address: 10

Data bus width 32 

=============================================================================

these are the result of calibration              

DDR Stress Test Iteration 1

Current Tempareture: 54

 

DDR Freq: 396 MHz

t0.1: data is addr test

t0: memcpy11 SSN test

t1: memcpy8 SSN test

t2: byte-wise SSN test

t3: memcpy11 random pattern test

t4: IRAM_to_DDRv2 test

t5: IRAM_to_DDRv1 test

t6: read noise walking ones and zeros test

Success: DDR Stress test completed!!!

Original Attachment has been moved to: mx6s_h5tc4g63cfr_pba.cfg.zip

Original Attachment has been moved to: mx6smyboard.c.zip

Original Attachment has been moved to: 40ohm_myboard_MX6s_DDR3_4Gb_32bit_v1.5-800mz.inc.zip

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