I'm seeing a hard fault exception when configuring FTM0 or FTM1 (both 2 channels) on a MK02Z16 device (also tested on KE06Z with same results). The same code sequence works fine on FTM2 which 8 channels so not sure if that's a factor. All of the example code I've found is for FTM2.
The code is simple:
SIM->SCGC |= SIM_SCGC_FTM1_MASK;
FTM1->MODE |= FTM_MODE_WPDIS_MASK;
The second line generates a hard-fault. However writes to certain FTM registers do not generate hard faults (for example a write to the SC register is OK, so it appears that writes to legacy TPM registers are OK).
Is anyone aware of special considerations for FTM0 and FTM1 on E series devices?