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i.MX6UL boot from eMMC (usdhc2) pinmux incorrect?

Question asked by Stefan Roese on Nov 6, 2015
Latest reply on Apr 28, 2016 by Dhvanil Patel

Hi,

 

I'm currently trying to boot via eMMC connected to usdhc2

on a custom i.MX6UL board. The device is working correctly. I've

testing this by loading U-Boot via USB or JTAG. But I've been

trying very hard to get booting from this eMMC to work. Without

success so far. And now my best guess is, that the pin-muxing

for this device on this custom board is not supported (incompatible)

by the BootROM. Here how its connected:

 

static iomux_v3_cfg_t const usdhc2_pads[] = {

  MX6_PAD_CSI_VSYNC__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),

  MX6_PAD_CSI_HSYNC__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),

  MX6_PAD_NAND_DATA00__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),

  MX6_PAD_NAND_DATA01__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),

  MX6_PAD_NAND_DATA02__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),

  MX6_PAD_NAND_DATA03__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),

  MX6_PAD_NAND_DATA04__USDHC2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),

  MX6_PAD_NAND_DATA05__USDHC2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),

  MX6_PAD_NAND_DATA06__USDHC2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),

  MX6_PAD_NAND_DATA07__USDHC2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),

 

  /*

  * RST_B

  */

  MX6_PAD_GPIO1_IO09__USDHC2_RESET_B | MUX_PAD_CTRL(NO_PAD_CTRL),

};

 

As you see, this differs at least in the CLK and CMD pins from

your i.MX6UL eval board. And the manual even lists in chapter

"8.5.3.4 IOMUX Configuration for SD/MMC" the supported pins.

This also suggests that the current pin configuration is not

supported and can't boot at all.

 

Before we do a redesign of this board, could you please comment

on this? Are my findings correct here? Is there some other

possibility to get the BootROM to use our pin-muxing for this

USDHC2 interface?

 

Any insights here are really appreciated.

 

Thanks,

Stefan

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