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watchdog program S9KEAZ128AMLH

Question asked by Joop aan den Toorn on Nov 5, 2015
Latest reply on Nov 8, 2015 by Kerry Zhou



I am trying to get the watchdog to work on an S9KEAZ128AMLH chip, running it from bare metal. The user manual states that the watchdog can be refreshed upon writing the following sequence to WDOG registers CNTH:CNTL




However, if I try this the chip resets immediately. I have also tried swapping the values (i.e. 0xA602 and 0xB480) with a 16-bit write, and even writing the CNTH and CNTL registers separately with those combinations. Same story when I try to unlock the chip with sequence (tried swapping the big/little endian order on those too)




To at least be able to work with the chip, I dived into the S32 IDE automatically generated code and blindly applied the code I found there to my own project:



  /* WDOG->TOVAL: TOVAL=0xE803 */

  WDOG->TOVAL = WDOG_TOVAL_TOVAL(0xE803); /* Timeout value */

  /* WDOG->CS2: WIN=0,FLG=0,??=0,PRES=0,??=0,??=0,CLK=1 */

  WDOG->CS2 = WDOG_CS2_CLK(0x01);       /* 1-kHz clock source */

  /* WDOG->CS1: EN=0,INT=0,UPDATE=1,TST=0,DBG=0,WAIT=1,STOP=1 */


             WDOG_CS1_TST(0x00) |

             WDOG_CS1_WAIT_MASK |


#endif /* (DISABLE_WDOG) */


I quickly learned that I could succesfully write to the control registers CS2 and CS1, after writing any random value to TOVAL. If I omit writing to TOVAL, the chip is reset immediately upon writing to CS2 or CS1. What is going on here? I believe the datasheet is either incomplete or incorrect but I need the watchdog function. What are the actual refreshing codes and how do I unlock the chip? What other settings on the chip can influence the watchdog? Am I doing something really wrong?