I am trying to program the flash of MKL05 using SWD (with GPIO).
1. The KL05 Sub-Family Reference Manual, Rev 3.1, November 2012 states at page 139, that AHB-AP is connected to SW-DP. But, from the ARM infocenter I could not find AHB-AP documentation related to Cortex-M0 (Only M1, M3 and M4). Which version of AHB-AP documentation should I refer to?
2. I have succesfully accessed MDM-AP, can read IDR (0x04770031) & Status, and can write/read Control registers. I can also read IDR of AHB-AP. But after writing 0x00000000 to AHB-AP.TAR, the SW-DP.CTRL/STAT shows STICKYERR set (first read of CTRL/STAT after TAR write is 0x00000040, second read of CTRL/STAT after TAR write is 0x00000060). Any AP access after this returns ACK = 4 (fail).
2.5. The AHB-AP.CSW == 0x03000042. Based on Cortex-M1 documentation, bits 27:24 are HPROT[3:0].
Any ideas what is causing this and how to proceed to access Flash Memory Module (FTFA)? Could it be a missing (power) enable somewhere?