Are the I.MX6 Dual/Quad SOCs capable of decoding two 1080p H.264 30fps streams? The "Fact Sheet" states that the Dual and Quad have two 2D graphics engines. Does this mean two VPUs, each capable of decoding one 1080p H.264 30fps stream? Assume DDR3 is 64 bits wide.
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please check p.6 presentation
Hi Inderjit
i.MX6DQ has one vpu and capable of decoding two 1080p H.264 30fps streams,
details can be found on slide 6 presentation
https://community.freescale.com/docs/DOC-95595
Best regards
igor
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The latest datasheet still has 264 MHz as the highest VPU clock frequency, and slide 6 of the presentation says the VPU has to have a frequency >300MHz. Is this officially supported?
from p.21 i.MX6DQ Datasheet (rev.4, 7/2015)
http://cache.freescale.com/files/32bit/doc/data_sheet/IMX6DQCEC.pdf
I was looking at the Reference Manual, Table 9-7:
Clock sources and range Core clock: up to 264 MHz
AXI bus clock: up to 264 MHz
IP bus clock: up to 66 MHz
Is the datasheet more accurate?
>datasheet more accurate
yes
Is the Dual Lite capable of decoding two 1080p H.264 30fps streams as well? The datasheet show that the VPU can go up to 328 MHz (Table 8).