i.MX6DQ DISP_CLK_PERIOD and DI_CLK_PERIOD.

[satoshishimoda]

Hi community,

I want to know how to calculate DISP_CLK_PERIOD and DI_CLK_PERIOD in datasheet (IMX6DQCEC Rev.4) chapter 4.11.10.6.3.

Datasheet says "The DISP_CLK_PERIOD, DI_CLK_PERIOD parameters are register-controlled.", so we can find dix_disp_clk_period in chapter 37.5.194 and chapter 37.5.230 in IMX6DQRM Rev.3.

Are these fields correspond with DISP_CLK_PERIOD?

And which register is correspond with DI_CLK_PERIOD?

Best Regards,

Satoshi Shimoda

[Yuri · Accepted solution]

Hello,

  The sections 37.5.194 37.5.230 in IMX6DQRM about IPUx_DIy_BS_CLKGEN0

relate to DI_CLK_PERIOD, whereas DISP_CLK_DOWN and DISP_CLK_UP parameters
(which are set via the  Base Sync Clock Gen 1 Register) define DISP_CLK_PERIOD.

DISP_CLK_PERIOD may be considered as sum of DISP_CLK_DOWN and DISP_CLK_UP

Have a great day,
Yuri

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