Dear all,
I found the following description in Hardware Development Guide.
"The distance should be less than 50mil between bulk cap and VDD_xx_CAP pins.Decoupling capacitors such as 0.1 μF or 0.22 μF should also be used. A 22 μF bulk capacitor must be placed as near as possible with pins/vias.
The distance should be less than 50mil between bulk cap and VDD_xx_CAP pins."
"The 22 μF bulk capacitors should be placed as close as possible to the associated VDD_xx_CAP ball, with trace widths and via sizes appropriate to the expected current draw.
A trace length of less than 50 mil is recommended."
I have some questions about these contents.
<<Question1>>
How should I understand this 50mil?
Does this mean the distance from a Through Hall(Via) (connected to MX6's VDD_xx_CAP pin) to a 22 μF bulk capacitor?
or
Does this mean the distance from a MX6's VDD_xx_CAP pin to a 22 μF bulk capacitor?
(Does this include thickness of the PCB?)
Please refer to an attached file.
- distance 50mil.pdf
<<Question2>>
Does the SABRE SD board meet these specifications?
<<Question3>>
What kind of problem occurs if I cannot meet these specifications in our original board?
May I have advice?
Best Regards,
Yuuki
Solved! Go to Solution.
Hi Yuuki
1. it does not include thickness of the PCB
2. Sabre AI board SCH-27142 follows this approach
3. potential issues :
display and Graphics issues.
random Memory bit errors.
system hang during high processing events.
Also please create service request, so additional document about capacitors
placement could be sent you.
Best regards
igor
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Q1. Does this mean the distance from a Through Hall(Via) (connected to MX6's VDD_xx_CAP pin) to a 22 ?F bulk capacitor? or Does this mean the distance from a MX6's VDD_xx_CAP pin to a 22 ?F bulk capacitor? (Does this include thickness of the PCB?
A1. It means a _trace_ length of 50mil, so, the board thickness is not included here.
Q2. Does the SABRE SD board meet these specifications?
A2. Yes, the i.MX6 SABRE SD boards meet this specification.
Q3. What kind of problem occurs if I cannot meet these specifications in our original board?
A3. The i.MX6 series Hardware Development Guide document clearly says the following: "Placing the decoupling capacitors close to the power balls is critical to minimize inductance and ensure high-speed transient current demand by the processor". Ignoring this requirement can make the design completely non-functional.
Have a great day,
Artur
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Hi Yuuki
1. it does not include thickness of the PCB
2. Sabre AI board SCH-27142 follows this approach
3. potential issues :
display and Graphics issues.
random Memory bit errors.
system hang during high processing events.
Also please create service request, so additional document about capacitors
placement could be sent you.
Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------
Dear Igor-san,
Thank you for your support.
I understand.
I will make SR about capacitors placement.
Best Regards,
Yuuki