I found the following description in Hardware Development Guide.
"The distance should be less than 50mil between bulk cap and VDD_xx_CAP pins.Decoupling capacitors such as 0.1 μF or 0.22 μF should also be used. A 22 μF bulk capacitor must be placed as near as possible with pins/vias.
The distance should be less than 50mil between bulk cap and VDD_xx_CAP pins."
"The 22 μF bulk capacitors should be placed as close as possible to the associated VDD_xx_CAP ball, with trace widths and via sizes appropriate to the expected current draw.
A trace length of less than 50 mil is recommended."
I have some questions about these contents.
How should I understand this 50mil?
Does this mean the distance from a Through Hall(Via) (connected to MX6's VDD_xx_CAP pin) to a 22 μF bulk capacitor?
Does this mean the distance from a MX6's VDD_xx_CAP pin to a 22 μF bulk capacitor?
(Does this include thickness of the PCB?)
Please refer to an attached file.
- distance 50mil.pdf
Does the SABRE SD board meet these specifications?
What kind of problem occurs if I cannot meet these specifications in our original board?
May I have advice?