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[e500] enabling hardware data cache coherency in Linux

Question asked by aleksander on Oct 5, 2015
Latest reply on Oct 6, 2015 by Scott Wood

Hello!

 

I am trying to enable hardware enforced coherency in P2020 in order to speed up communication between core and eTSEC.

Unfortunately, I cannot find, how to set/clear proper bits in MAS2 register, using standard linux kernel API. Is there any way to do this clean way, or should I just hack my way out?

The only proof that Linux might set those bits is in [2], function, but that doesn't lead me to any generic kernel api function.

 

[1] http://www.freescale.com/files/32bit/doc/app_note/AN3544.pdf

[2] Linux/arch/powerpc/mm/fsl_booke_mmu.c - Linux Cross Reference - Free Electrons

 

regards

Aleksander

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