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Add Marvell ethernet switch to imx6q using kernel 3.10.53

Question asked by aznjaput on Oct 2, 2015
Latest reply on Nov 20, 2015 by aznjaput

Hi,

 

I've perused the forums for some assistance, but have struggled the last few days with bringing up this network switch. Hopefully someone here can shed some light. I'm trying to get a Marvell ethernet switch, particularly the 88E6071, to work on the imx6q processor. I'm currently using kernel version 3.10.53.

 

Hardware-wise, the Marvell 88E6071 is configured for MII PHY mode and it connected to the CPU accordingly. In the startup log pasted below, the following error is what I’m currently trying to track down:

dsa: probe of dsa.26 failed with error -22

 

Digging into the driver, it seems like of_mdio_find_bus() is failing to find the mii_bus. It finds the mii_bus node in the dtb file, but can’t seem to find the associated mii_bus. The comments for the function state:

* Because the association of a device_node and mii_bus is made via

* of_mdiobus_register(), the mii_bus cannot be found before it is

* registered with of_mdiobus_register().

 

It sounds like of_mdiobus_register() needs to be called first, but of_mdiobus_register() is never invoked. Any ideas? Am I on the right path? Any help would be appreciated. Startup log and DTS snippets are pasted below:

 

Thanks,

 

Startup log:

[    0.248886] >>> mdio_bus_init 1 <<<

[    0.248905] >>> mdio_bus_init 2 <<<

[    1.061101] fec 2188000.ethernet (unregistered net_device): Invalid MAC address: 00:00:00:00:00:00

[    1.068829] fec 2188000.ethernet (unregistered net_device): Using random MAC address: a2:ee:25:41:9c:b0

[    1.077110] >>> fec_enet_mii_init 1 <<<

[    1.079670] >>> fec_enet_mii_init 2 <<<

[    1.082231] >>> fec_enet_mii_init 3 <<<

[    1.084816] >>> fec_enet_mii_init 4 <<<

[    1.087375] >>> mdiobus_register 1 <<<

[    1.089846] >>> bus->name: fec_enet_mii_bus <<<

[    1.093098] >>> mdiobus_register 2 <<<

[    1.095599] >>> mii_bus->id: 2188000.ethernet <<<

[    1.099095] >>> mdiobus_register 3 <<<

[    1.106211] libphy: fec_enet_mii_bus: probed

[    1.109208] >>> fec_enet_mii_init 5 <<<

[    1.112191] fec 2188000.ethernet eth0: registered PHC device 0

[    2.355536] Distributed Switch Architecture driver version 0.1

[    2.360095] >>> dsa_probe 1 <<<

[    2.361958] >>> dsa_probe 2 <<<

[    2.363820] >>> dsa_of_probe 1 <<<

[    2.365996] >>> dsa_of_probe 2 <<<

[    2.368121] >>> of_mdio_find_bus 1 <<<

[    2.370592] >>> name: mdio <<<

[    2.372369] >>> full_name: /soc/aips-bus@02100000/ethernet@02188000/mdio@0 <<<

[    2.378333] >>> of_mdio_find_bus 2 <<<

[    2.380808] >>> of_mdio_bus_match 1 <<<

[    2.383366] >>> of_mdio_find_bus 3 <<<

[    2.385867] dsa: probe of dsa.26 failed with error -22

[    4.246438] >>> phy_connect 1 <<<

[    4.248457] >>> phy_id: 2188000.ethernet:18 <<<

[    4.251789] fec 2188000.ethernet eth0: Freescale FEC PHY driver [Generic PHY] (mii_bus:phy_addr=2188000.ethernet:18, irq=-1)

[    4.274122] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready

 

DTS snippets:

dsa@0 {

        compatible = "marvell,dsa";

        #address-cells = <2>;

        #size-cells = <0>;

        interrupts = <10>;

        dsa,ethernet = <&fec>;

        dsa,mii-bus = <&mdio_bus>;

 

        switch@0 {

                #address-cells = <1>;

                #size-cells = <0>;

                reg = <16 0>;   /* MDIO address 16, switch 0 in tree */

 

                port@0 {

                        reg = <0>;

                        label = "lan0";

                        phy-handle = <&ethphy0>;

                };

                port@2 {

                        reg = <2>;

                        label = "lan2";

                        phy-handle = <&ethphy2>;

                };

                port@4 {

                        reg = <4>;

                        label = "lan4";

                        phy-handle = <&ethphy4>;

                };

                port@5 {

                        reg = <5>;

                        label = "cpu";

                        /*phy-handle = <&ethphy5>;*/

                };

        };

};

 

&fec {

        pinctrl-names = "default";

        pinctrl-0 = <&pinctrl_enet_4>;

        phy-mode = "mii";

        /*phy-handle = <&ethphy0>;*/

        phy-reset-gpios = <&gpio6 21 0>;

        status = "okay";

        #address-cells = <0>;

        #size-cells = <1>;

 

        phy_int {

                reg = <0x6>;

                interrupt-parent = <&gpio6>;

                interrupts = <22 IRQ_TYPE_LEVEL_LOW>;

        };

        fixed-link {

                speed = <100>;

                full-duplex;

        };

        mdio_bus: mdio@0 {

                #address-cells = <1>;

                #size-cells = <0>;

                device_type = "mdio";

                /*compatible = "fsl,gianfar-mdio";*/

                /*compatible = "fsl,pq1-fec-mdio";*/

                status = "okay";

 

                ethphy0: ethernet-phy@0 {

                        reg = <0>;

                };

                ethphy1: ethernet-phy@1 {

                        reg = <1>;

                };

                ethphy2: ethernet-phy@2 {

                        reg = <2>;

                };

                ethphy3: ethernet-phy@3 {

                        reg = <3>;

                };

                ethphy4: ethernet-phy@4 {

                        reg = <4>;

                };

               ethphy5: ethernet-phy@5 {

                        reg = <5>;

                };

        };

};

 

fec: ethernet@02188000 {

        compatible = "fsl,imx6q-fec";

        reg = <0x02188000 0x4000>;

        interrupts-extended = <&intc 0 118 0x04>,

                              <&intc 0 119 0x04>;

        clocks = <&clks 117>, <&clks 117>, <&clks 190>;

        clock-names = "ipg", "ahb", "ptp";

        status = "disabled";

};

 

enet {

        pinctrl_enet_4: enetgrp-4 {

                fsl,pins = <

                        MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0

                        MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0

                        MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0     0x1b0b0

                        MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1     0x1b0b0

                        MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2      0x1b0b0

                        MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3      0x1b0b0

                        /*MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0*/

                        MX6QDL_PAD_GPIO_18__ENET_RX_CLK         0x1b0b0

                        MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0     0x1b0b0

                        MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1     0x1b0b0

                        MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2      0x1b0b0

                        MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3      0x1b0b0

                        /*MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0*/

                        MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN      0x1b0b0

                        MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER       0x1b0b0

                        MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN       0x1b0b0

                        MX6QDL_PAD_KEY_COL3__ENET_CRS           0x1b0b0

                        MX6QDL_PAD_KEY_ROW1__ENET_COL           0x1b0b0

                >;

        };

};

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