AnsweredAssumed Answered

CSI Parallel Capture problems on a i.MX6 DualLite

Question asked by Pantelis Antoniou on Oct 1, 2015
Latest reply on Oct 6, 2015 by Pantelis Antoniou

Hello,

 

I am facing problems getting input on a CSI1 connected HDMI receiver which is using parallel mode capture.

Register contents seem fine, and everything is setup correctly but I get the dreaded

"ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0" message and no EOF interrupt at-all.

 

I have tried everything, including moving to embedded sync, reversing polarities, hooking the DATA_EN via SION to

always enabled etc. Clocks, HSYNC, VSYNC and DATA_EN seem to be fine, and turning the muxing into GPIO inputs

and measuring report the values programmed in the HDMI receiver. I am including register dumps and dmesg output.

 

Kernel version tried are imx_3.14.28 and boundary-imx_3.14.38_6qp_beta-cec

Is there a way to debug problems like that? I.e. is there a way to instrument in the IPU to report number of HSYNCs,VSYNCs

counted, or any other kind of debugging capabilities?

 

If I had to guess there might be a problem with the clocks or the muxing but I can't find anything wrong.

 

pinmuxing in DT:

MX6QDL_PAD_EIM_D28__IPU1_CSI1_DATA12    0xb0b1          /* CCIRB_0 */

MX6QDL_PAD_EIM_D27__IPU1_CSI1_DATA13    0xb0b1          /* CCIRB_1 */

MX6QDL_PAD_EIM_D26__IPU1_CSI1_DATA14    0xb0b1          /* CCIRB_2 */

MX6QDL_PAD_EIM_D20__IPU1_CSI1_DATA15    0xb0b1          /* CCIRB_3 */

MX6QDL_PAD_EIM_D19__IPU1_CSI1_DATA16    0xb0b1          /* CCIRB_4 */

MX6QDL_PAD_EIM_D18__IPU1_CSI1_DATA17    0xb0b1          /* CCIRB_5 */

MX6QDL_PAD_EIM_D16__IPU1_CSI1_DATA18    0xb0b1          /* CCIRB_6 */

MX6QDL_PAD_EIM_EB2__IPU1_CSI1_DATA19    0xb0b1          /* CCIRB_7 */

MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC     0xb0b1          /* CCIRB_VSYNC */

MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC     0xb0b1          /* CCIRB_HSYNC */

MX6QDL_PAD_EIM_D17__IPU1_CSI1_PIXCLK    0xb0b1          /* CCIRB_CLK */

MX6QDL_PAD_EIM_D23__IPU1_CSI1_DATA_EN   0xb0b1          /* CCIRB_DE */

 

dmesg dump:

mxc_v4l_open: Mxc Camera ipu0/csi1

mxc_cam_select_input: input(1) CSI MEM

ep9555e 2-003c: ep9555e:ioctl_g_ifparm

   clock_curr=mclk=24000000

vsync_pol(0) hsync_pol(0) ext_vsync(1)

ep9555e 2-003c: ep9555e:ioctl_g_fmt_cap

ep9555e 2-003c:    Returning size of 720x480

   g_fmt_cap returns widthxheight of input as 720 x 480

On Open: Input to ipu size is 720 x 480

End of setup_ifparm: v2f pix widthxheight 720 x 480

End of setup_ifparm: crop_bounds widthxheight 720 x 480

End of setup_ifparm: crop_defrect widthxheight 720 x 480

End of setup_ifparm: crop_current widthxheight 720 x 480

ep9555e 2-003c: ep9555e:ioctl_g_fmt_cap

ioctl_g_fmt_cap: left=0, top=0, 720x480

imx-ipuv3 2400000.ipu: drivers/mxc/ipu3/ipu_capture.c:87 @ipu_csi_init_interface: CSI1_SENS_CONF=0x04008a00

imx-ipuv3 2400000.ipu: drivers/mxc/ipu3/ipu_capture.c:141 @ipu_csi_init_interface: CSI1_SENS_CONF=0x00008a00

imx-ipuv3 2400000.ipu: ipu_csi_init_interface: 720x480

imx-ipuv3 2400000.ipu: CSI_SENS_CONF = 0x00008A00

imx-ipuv3 2400000.ipu: CSI_ACT_FRM_SIZE = 0x01DF02CF

ep9555e 2-003c: ep9555e:ioctl_s_power

ep9555e 2-003c: ep9555e: ioctl_s_power: POWER on

ep9555e 2-003c: In ep9555e:ioctl_init

ep9555e 2-003c: ep9555e:ioctl_dev_init

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c02c5651 ipu0/csi1

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c02c564a ipu0/csi1

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c0405602 ipu0/csi1

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c0405602 ipu0/csi1

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c0cc5616 ipu0/csi1

   case VIDIOC_S_PARM

mxc_v4l2_s_param

ep9555e 2-003c: In ep9555e:ioctl_g_parm

ep9555e 2-003c:    type is V4L2_BUF_TYPE_VIDEO_CAPTURE

   Current capabilities are 1

   Current capturemode is 0  change to 0

   Current framerate is 30  change to 30

ep9555e 2-003c: In ep9555e:ioctl_s_parm

ep9555e 2-003c: ep9555e:ioctl_g_ifparm

   clock_curr=mclk=24000000

vsync_pol(0) hsync_pol(0) ext_vsync(1)

ep9555e 2-003c: ep9555e:ioctl_g_fmt_cap

ep9555e 2-003c:    Returning size of 720x480

   g_fmt_cap returns widthxheight of input as 720 x 480

ep9555e 2-003c: ep9555e:ioctl_g_fmt_cap

ioctl_g_fmt_cap: left=0, top=0, 720x480

imx-ipuv3 2400000.ipu: drivers/mxc/ipu3/ipu_capture.c:87 @ipu_csi_init_interface: CSI1_SENS_CONF=0x00008a00

imx-ipuv3 2400000.ipu: drivers/mxc/ipu3/ipu_capture.c:141 @ipu_csi_init_interface: CSI1_SENS_CONF=0x00008a00

imx-ipuv3 2400000.ipu: ipu_csi_init_interface: 720x480

imx-ipuv3 2400000.ipu: CSI_SENS_CONF = 0x00008A00

imx-ipuv3 2400000.ipu: CSI_ACT_FRM_SIZE = 0x01DF02CF

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c0045627 ipu0/csi1

   case VIDIOC_S_INPUT(1)

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c014563b ipu0/csi1

   case VIDIOC_G_CROP

mxc_v4l_ioctl

mxc_v4l_do_ioctl: 4014563c ipu0/csi1

   case VIDIOC_S_CROP

   Cropping Input to ipu size 720 x 480

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c0cc5605 ipu0/csi1

   case VIDIOC_S_FMT

mxc_v4l2_s_fmt: 720x480, type=1

   type=V4L2_BUF_TYPE_VIDEO_CAPTURE

End of mxc_v4l2_s_fmt: v2f pix widthxheight 720 x 480

End of mxc_v4l2_s_fmt: crop_bounds widthxheight 720 x 480

End of mxc_v4l2_s_fmt: crop_defrect widthxheight 720 x 480

End of mxc_v4l2_s_fmt: crop_current widthxheight 720 x 480

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c008561c ipu0/csi1

   case VIDIOC_S_CTRL

mxc_v4l2_s_ctrl

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c0145608 ipu0/csi1

   case VIDIOC_REQBUFS

mxc_streamoff: ipu0/csi1 capture_on=0 CSI MEM

mxc_free_frame_buf

mxc_allocate_frame_buf: size=518400

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c0cc5604 ipu0/csi1

   case VIDIOC_G_FMT

mxc_v4l2_g_fmt: type=1

   type is V4L2_BUF_TYPE_VIDEO_CAPTURE

End of mxc_v4l2_g_fmt: v2f pix widthxheight 720 x 480

End of mxc_v4l2_g_fmt: crop_bounds widthxheight 720 x 480

End of mxc_v4l2_g_fmt: crop_defrect widthxheight 720 x 480

End of mxc_v4l2_g_fmt: crop_current widthxheight 720 x 480

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c0445609 ipu0/csi1

   case VIDIOC_QUERYBUF

mxc_v4l2_buffer_status

mxc_mmap:pgoff=0x48e00, start=0x76dd6000, end=0x76e55000

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c0445609 ipu0/csi1

   case VIDIOC_QUERYBUF

mxc_v4l2_buffer_status

mxc_mmap:pgoff=0x48e80, start=0x76d57000, end=0x76dd6000

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c0445609 ipu0/csi1

   case VIDIOC_QUERYBUF

mxc_v4l2_buffer_status

mxc_mmap:pgoff=0x48f00, start=0x76cd8000, end=0x76d57000

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c044560f ipu0/csi1

   case VIDIOC_QBUF, length=0

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c044560f ipu0/csi1

   case VIDIOC_QBUF, length=0

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c044560f ipu0/csi1

   case VIDIOC_QBUF, length=0

mxc_v4l_ioctl

mxc_v4l_do_ioctl: 40045612 ipu0/csi1

   case VIDIOC_STREAMON

mxc_streamon

imx-ipuv3 2400000.ipu: init channel = 16

imx-ipuv3 2400000.ipu: init channel = 16

imx-ipuv3 2400000.ipu: drivers/mxc/ipu3/ipu_common.c:808 @ipu_init_channel: CSI1_SENS_CONF=0x00008a00

imx-ipuv3 2400000.ipu: _ipu_csi_init: in CSI_SENS_CONF = 0x00008A00

imx-ipuv3 2400000.ipu: _ipu_csi_init:CSI_SENS_CONF: ipu=80951558,csi=1,data=4008a00, channel=10ffffc1

imx-ipuv3 2400000.ipu: drivers/mxc/ipu3/ipu_capture.c:843 @_ipu_csi_init: CSI1_SENS_CONF=0x04008a00

imx-ipuv3 2400000.ipu: initializing idma ch 1 @ c08c0040

imx-ipuv3 2400000.ipu: ch 1 word 0 - 00000000 2A300000 000D2F00 E0000000 00077C59

imx-ipuv3 2400000.ipu: ch 1 word 1 - 08080000 01010000 0047C000 0000B3C0 00000167

imx-ipuv3 2400000.ipu: PFS 0x2,

imx-ipuv3 2400000.ipu: BPP 0x0,

imx-ipuv3 2400000.ipu: NPB 0x1f

imx-ipuv3 2400000.ipu: FW 719,

imx-ipuv3 2400000.ipu: FH 479,

imx-ipuv3 2400000.ipu: EBA0 0x40400000

imx-ipuv3 2400000.ipu: EBA1 0x40400000

imx-ipuv3 2400000.ipu: Stride 719

imx-ipuv3 2400000.ipu: scan_order 0

imx-ipuv3 2400000.ipu: uv_stride 359

imx-ipuv3 2400000.ipu: u_offset 0x54600

imx-ipuv3 2400000.ipu: v_offset 0x69780

imx-ipuv3 2400000.ipu: Width0 0+1,

imx-ipuv3 2400000.ipu: Width1 0+1,

imx-ipuv3 2400000.ipu: Width2 0+1,

imx-ipuv3 2400000.ipu: Width3 0+1,

imx-ipuv3 2400000.ipu: Offset0 7,

imx-ipuv3 2400000.ipu: Offset1 11,

imx-ipuv3 2400000.ipu: Offset2 0,

imx-ipuv3 2400000.ipu: Offset3 0

eba 48e00000

eba 48e80000

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c0445611 ipu0/csi1

   case VIDIOC_DQBUF

mxc_v4l_dqueue

ERROR: v4l2 capture: mxc_v4l_dqueue() interrupt received

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c0445611 ipu0/csi1

   case VIDIOC_DQBUF

mxc_v4l_dqueue

ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0

mxc_v4l_ioctl

mxc_v4l_do_ioctl: c044560f ipu0/csi1

   case VIDIOC_QBUF, length=0

ERROR: v4l2 capture: VIDIOC_QBUF: buffer already queued

mxc_v4l_ioctl

mxc_v4l_do_ioctl: 40045613 ipu0/csi1

   case VIDIOC_STREAMOFF

mxc_streamoff: ipu0/csi1 capture_on=1 CSI MEM

imx-ipuv3 2400000.ipu: CSI stop timeout - 5 * 10ms

mxc_free_frames

mxc_v4l_close

mxc_streamoff: ipu0/csi1 capture_on=0 CSI MEM

mxc_v4l_close: release resource

mxc_free_frame_buf

mxc_free_frames

power_down_callback: ipu0/csi1

ep9555e 2-003c: ep9555e:ioctl_s_power

ep9555e 2-003c: ep9555e: ioctl_s_power: POWER off

mxc_sdc_fb fb.18: blank = 1

imx-ipuv3 2400000.ipu: DC stop timeout - 0 * 10ms

imx-ipuv3 2400000.ipu: ipu busfreq high release.

 

Register dump:

 

0x20E0174: IOMUXC_SW_MUX_CTL_PAD_EIM_DATA28         0x00000003

0x20E0544: IOMUXC_SW_PAD_CTL_PAD_EIM_DATA28         0x0000b0b1

0x20E0890: IOMUXC_IPU1_SENS1_DATA12_SELECT_INPUT    0x00000001

0x20E0170: IOMUXC_SW_MUX_CTL_PAD_EIM_DATA27         0x00000003

0x20E0540: IOMUXC_SW_PAD_CTL_PAD_EIM_DATA27         0x0000b0b1

0x20E0894: IOMUXC_IPU1_SENS1_DATA13_SELECT_INPUT    0x00000001

0x20E016C: IOMUXC_SW_MUX_CTL_PAD_EIM_DATA26         0x00000003

0x20E053C: IOMUXC_SW_PAD_CTL_PAD_EIM_DATA26         0x0000b0b1

0x20E0898: IOMUXC_IPU1_SENS1_DATA14_SELECT_INPUT    0x00000001

0x20E0154: IOMUXC_SW_MUX_CTL_PAD_EIM_DATA20         0x00000003

0x20E0524: IOMUXC_SW_PAD_CTL_PAD_EIM_DATA20         0x0000b0b1

0x20E089C: IOMUXC_IPU1_SENS1_DATA15_SELECT_INPUT    0x00000001

0x20E0150: IOMUXC_SW_MUX_CTL_PAD_EIM_DATA19         0x00000003

0x20E0520: IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19         0x0000b0b1

0x20E08A0: IOMUXC_IPU1_SENS1_DATA16_SELECT_INPUT    0x00000001

0x20E014C: IOMUXC_SW_MUX_CTL_PAD_EIM_DATA18         0x00000003

0x20E051C: IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18         0x0000b0b1

0x20E08A4: IOMUXC_IPU1_SENS1_DATA17_SELECT_INPUT    0x00000001

0x20E014C: IOMUXC_SW_MUX_CTL_PAD_EIM_DATA18         0x00000003

0x20E051C: IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18         0x0000b0b1

0x20E08A8: IOMUXC_IPU1_SENS1_DATA18_SELECT_INPUT    0x00000001

0x20E01CC: IOMUXC_SW_MUX_CTL_PAD_EIM_EB2_B          0x00000003

0x20E059C: IOMUXC_SW_PAD_CTL_PAD_EIM_EB2_B          0x0000b0b1

0x20E08AC: IOMUXC_IPU1_SENS1_DATA19_SELECT_INPUT    0x00000001

0x20E0160: IOMUXC_SW_MUX_CTL_PAD_EIM_DATA23         0x00000004

0x20E0530: IOMUXC_SW_PAD_CTL_PAD_EIM_DATA23         0x0000b0b1

0x20E08B0: IOMUXC_IPU1_SENS1_DATA_EN_SELECT_INPUT   0x00000000

0x20E01D0: IOMUXC_SW_MUX_CTL_PAD_EIM_EB3_B          0x00000004

0x20E05A0: IOMUXC_SW_PAD_CTL_PAD_EIM_EB3_B          0x0000b0b1

0x20E08B4: IOMUXC_IPU1_SENS1_HSYNC_SELECT_INPUT     0x00000001

0x20E0148: IOMUXC_SW_MUX_CTL_PAD_EIM_DATA17         0x00000003

0x20E0518: IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17         0x0000b0b1

0x20E08B8: IOMUXC_IPU1_SENS1_PIX_CLK_SELECT_INPUT   0x00000001

0x20E0178: IOMUXC_SW_MUX_CTL_PAD_EIM_DATA29         0x00000006

0x20E0548: IOMUXC_SW_PAD_CTL_PAD_EIM_DATA29         0x0000b0b1

0x20E08BC: IOMUXC_IPU1_SENS1_VSYNC_SELECT_INPUT     0x00000000

0x2600000: IPU_CONF                                 0x00000762

0x2600004: IPU_SISG_CTRL0                           0x00000000

0x2600008: IPU_SISG_CTRL1                           0x00000000

0x260003C: IPU_INT_CTRL_1                           0x80000002

0x2600040: IPU_INT_CTRL_2                           0x00080000

0x2600044: IPU_INT_CTRL_3                           0x00000000

0x2600048: IPU_INT_CTRL_4                           0x00000000

0x260004C: IPU_INT_CTRL_5                           0xbffeff2f

0x2600050: IPU_INT_CTRL_6                           0x001fff02

0x2600054: IPU_INT_CTRL_7                           0x00000000

0x2600058: IPU_INT_CTRL_8                           0x00000000

0x260005C: IPU_INT_CTRL_9                           0xdc000001

0x2600060: IPU_INT_CTRL_10                          0x777f000f

0x2600064: IPU_INT_CTRL_11                          0x00000000

0x2600068: IPU_INT_CTRL_12                          0x00000000

0x260006C: IPU_INT_CTRL_13                          0x00000000

0x2600070: IPU_INT_CTRL_14                          0x00000000

0x2600074: IPU_INT_CTRL_15                          0x00000000

0x2600078: IPU_SDMA_EVENT_1                         0x00000000

0x260007C: IPU_SDMA_EVENT_2                         0x00000000

0x2600080: IPU_SDMA_EVENT_3                         0x00000000

0x2600084: IPU_SDMA_EVENT_4                         0x00000000

0x2600088: IPU_SDMA_EVENT_7                         0x00000000

0x260008C: IPU_SDMA_EVENT_8                         0x00000000

0x2600090: IPU_SDMA_EVENT_11                        0x00000000

0x2600094: IPU_SDMA_EVENT_12                        0x00000000

0x2600098: IPU_SDMA_EVENT_13                        0x00000000

0x260009C: IPU_SDMA_EVENT_14                        0x00000000

0x2600200: IPU_INT_STAT_1                           0x00800000

0x2600204: IPU_INT_STAT_2                           0x00000000

0x2600208: IPU_INT_STAT_3                           0x00800000

0x260020C: IPU_INT_STAT_4                           0x00000000

0x2600210: IPU_INT_STAT_5                           0x00000000

0x2600214: IPU_INT_STAT_6                           0x00000000

0x2600218: IPU_INT_STAT_7                           0x00800000

0x260021C: IPU_INT_STAT_8                           0x00000000

0x2600220: IPU_INT_STAT_9                           0x00000000

0x2600224: IPU_INT_STAT_10                          0x00000000

0x2600228: IPU_INT_STAT_11                          0x00000000

0x260022C: IPU_INT_STAT_12                          0x00000000

0x2600230: IPU_INT_STAT_13                          0x00800000

0x2600234: IPU_INT_STAT_14                          0x00000000

0x2600238: IPU_INT_STAT_15                          0x01bf400c

0x260023C: IPU_CUR_BUF_0                            0x00000002

0x2600240: IPU_CUR_BUF_1                            0x00000000

0x2600244: IPU_ALT_CUR_BUF_0                        0x00000000

0x2600248: IPU_ALT_CUR_BUF_1                        0x00000000

0x2638000: IPU_CSI1_SENS_CONF                       0x04008a00

0x2638004: IPU_CSI1_SENS_FRM_SIZE                   0x01df02cf

0x2638008: IPU_CSI1_ACT_FRM_SIZE                    0x01df02cf

0x263800C: IPU_CSI1_OUT_FRM_CTRL                    0x00000000

0x2638010: IPU_CSI1_TST_CTRL                        0x00000000

0x2638014: IPU_CSI1_CCIR_CODE_1                     0x00040030

0x2638018: IPU_CSI1_CCIR_CODE_2                     0x00000000

0x263801C: IPU_CSI1_CCIR_CODE_3                     0x00ff0000

0x26000A8: IPU_FS_PROC_FLOW1                        0x00000000

0x26000AC: IPU_FS_PROC_FLOW2                        0x00000000

0x26000B0: IPU_FS_PROC_FLOW3                        0x00000000

0x20E0034: IOMUXC_GPR13                             0x00000024

 

Outcomes