Hello,
I am access FPGA connected over EIM interface in iMX6 Sabre-SDB.
The EIM registers are configured as follows:
EIM_CSnGCR1 : 1191503f
EIM_CSnGCR2 : 1002
EIM_CSnRCR1 : 7101111
EIM_CSnRCR2 : 1c
EIM_CSnWCR1 : 6209249
EIM_CSnWCR2 : 0
When i tried to long read (using readl), burst read is not happening. Instead sequential reads are happening. In short, the address gets incremented and sequential 16-bit read occurs.
I observed this behavior using logic analyzer.
Please let me know, if the configuration above is correct(for synchronous burst read in multiplexed mode) ?
What else am i missing?
Is there any sample code for synchronous burst read?
Thank you in advance.
Regards,
Dasnavis Sabiya
Hi Dasnavis
EIM does not produce burst from multiple single reads, master
should produce burst (for example from arm using ldm/stm instructions or
sdma transfer). Conditions for burst termination are given in
sect.22.5.3 Burst Mode (Synchronous) Memory Operation
i.MX6DQ Reference Manual (rev.2 7/2014)
http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf
As example one can look at attached i.MX53 tests, seems settings
can be reused for i.MX6.
Best regards
igor
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