I have encountered a PCIe error on my P1012 microprocessor.
I have three microprocessors (u1,u2 and u3) communicating through PCIe as follows:
- u1(EP) and u3(RC) communicate though point to point PCIe (bus0)
- u2(EP) and u3(RC) communicate though point to point PCIe (bus1)
- u1 and u2 communicate through a PCIe bridge
I have a program which continuously performs memory read and write operations over PCIe inbound and outbound windows on each microprocessor. Everything works fine if the transactions are performed sequencially but I have found that whenever I try to read a message from u1 in u3 and at the same time a bridge communication is performed between u1 and u2, the Linux kernel running over u3 halts with error code “unhandled signal 11 at 00000000 nip 1000b448 lr 1001c8e8 code 30001”. No error is detected on the microprocessor PCIe registers and the link status seems to be OK. Is the brigde and point-to-point configuration an issue when they are used at the same time over the same bus? Also, is there a way to check if the PCIe memory space assigned for incoming and outcoming transactions is ready to be read/written?
Thanks in advance,