MMA8452Q PCB layout suggestions

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MMA8452Q PCB layout suggestions

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martincoster
Contributor II

Attached image of my MMA8452Q PCB layout. Any comments on the design? The data sheet says I should provide dangling tracks for unused pins, to reduce stress during reflow. Also kept any via's >2mm away from chip as per data sheet, and no ground plane below chip. Our application is very basic, I will just pole the chip for data once a second. I do not need interrupts. Any comments appreciated.

Screen Shot 2015-09-26 at 9.55.18 pm.png

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reyes
NXP TechSupport
NXP TechSupport

Hi Martin,

I just checked the part of the layout you sent and everything seems to be correct, you should not get any problem related with the layout of the MMA8452Q.


Have a great day,
Jose Reyes

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reyes
NXP TechSupport
NXP TechSupport

Hi Martin,

I just checked the part of the layout you sent and everything seems to be correct, you should not get any problem related with the layout of the MMA8452Q.


Have a great day,
Jose Reyes

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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martincoster
Contributor II

Thanks!

Martin

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