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Basic info on p3041 PAMU settings for DMA from ELBC device

Question asked by david howard on Sep 22, 2015
Latest reply on Sep 29, 2015 by david howard

I'm trying to understand how the PAMU interacts with the P3041 DMA 0 for doing a transfer from a device on the ELBC to RAM. we are using an OS that enables the PAMU and sets up a default configuration for the PAMU LIODN for the DMA 0 Device. we can read from the ELBC device in software and it is mapped correctly from the CPU side. When we try to DMA from the device to RAM we get a 'transaction error'. If we disable the PAMU completely it works. My problem is I don't completely understand how the DSA window and the window size need to be configured.


Here is how i am guessing the PAMU window works ( assume i am wrong so please correct me): assume the ELBC device has a size of 4K and is non-cached. I should set the DSA window to a location in RAM with the same size, 4K(and following the rules on size, alignment etc). Then I can only DMA from the ELBC device to that 4K region in RAM. and if i want to dma from an offset in the ELBC device, i would have to dma to the same offset in the DSA window. Also, since the ELBC device is cache-disabled, do I still set the PAACE bit for coherence-required? Does the coherence required bit refer just to the RAM area and not the source ELBC device?