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LPDDR2 on i.MX6DL

Question asked by Elliott Yang on Sep 23, 2015
Latest reply on Sep 24, 2015 by Elliott Yang

Hi All

 

I would like to use e.MCP(Kingston 08EMCP08-NL2CV100-C50) which is e.MMC 8GB + LPDDR2 8Gbit on our i.MX platform .

Freescale provides a table for the DDR3 and LPDDR2 pin mux mapping (IMX6SDLRM.pdf page.3904)

But I don't know what is the DRAM_BA0 and DRAM_BA1, does it mean DRAM_SDBA0 and DRAM_SDBA1?

 

Could anyone help me to check the schematic?

 

Thanks,

 

Elliott

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