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Why MMPF0100 VREFDDR startup few late?

Question asked by torus1000 on Sep 18, 2015
Latest reply on Sep 24, 2015 by torus1000

Dear Analog experts,

 

I'm not familiar with OP Amp.
When I measured MMPF0100/F0 PMIC output timing, most of SWx turned on just in time(Sq# x 2ms).

 

Why only VREF DDR output so delayed to start turn-on?

It seems to kept on low around 400us.

Can anybody help me?

Thanks

vref_ddrQ.png

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