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Identification of i.MX53 Silicon Revision

Question asked by Marc-Oliver Westerburg on Sep 17, 2015
Latest reply on Sep 18, 2015 by Marc-Oliver Westerburg

Hi all


I am currently wondering about identification of different i.MX53 silicon revisions in software:


Linux-Kernels seem to read the IIM_SREV register, which seems to contain just some kind of incrementing(?) number for different silicon revisions, with the following known relationships between the IIM_SREV contents and known silicon revisions:

case 0x0: return IMX_CHIP_REVISION_1_0;

case 0x2: return IMX_CHIP_REVISION_2_0;

case 0x3: return IMX_CHIP_REVISION_2_1;


I can't find no official documentation on these numbers, though.


All boot-loaders (U-Boot, Barebox, RedBoot) seem to read a byte-constant from the on-chip ROM (offset 0x48) instead, which seems to contain major silicon revision in the high-nibble, and minor silicon revision in the low-nibble, i.e. 0x21 for Revision 2.1. This mechanism seems to be completely undocumented, though.


All fine and dandy, so far: All i.MX53 SoCs (product marking MCIMX535DVV1C N78C) we equipped in our products so far returned 0x3 via IIM_SREV and 0x21 via the ROM-constant. Just recently we noticed i.MX535 SoCs (identical product marking on the chip), which return 0x4 in IIM_SREV instead and therefore are not properly recognized by the Linux kernel anymore, but still return 0x21 (i.e. Rev 2.1) in the ROM-constant read by the bootloaders.


What happened with these newer(?) SoCs? Which way is the proper way to identify i.MX53 silicon revisions in software? Is there any official documentation available on this?



Kind regards,