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P2020 Power On Reset Configuration

Question asked by mdz on Sep 14, 2015
Latest reply on Sep 15, 2015 by Serguei Podiatchev

Are the Vil max/Vih min thresholds for the power on reset configuration pins the same as regular logic levels? For example, if the RGMII interface is set up to operate at 2.5V, does a power on reset config pin using an RGMII pin have 2.5V CMOS thresholds?

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